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| author | Jim Grosbach <grosbach@apple.com> | 2011-11-10 22:10:12 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-11-10 22:10:12 +0000 |
| commit | 1b332860aef0121cf4591f4377a7201ce0ef8366 (patch) | |
| tree | f674814c505f42f107edbf7ba47732158a0af3f6 | |
| parent | eaf4221cef44f5e5094b60099f6e52a8e431bb49 (diff) | |
| download | llvm-1b332860aef0121cf4591f4377a7201ce0ef8366.tar.gz llvm-1b332860aef0121cf4591f4377a7201ce0ef8366.tar.bz2 llvm-1b332860aef0121cf4591f4377a7201ce0ef8366.tar.xz | |
Thumb MUL assembly parsing for 3-operand form.
Get the source register that isn't tied to the destination register correct,
even when the assembly source operand order is backwards.
rdar://10428630
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144322 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 16 | ||||
| -rw-r--r-- | test/MC/ARM/basic-thumb-instructions.s | 2 |
2 files changed, 11 insertions, 7 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index f142e686df..d8870532da 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -3415,13 +3415,15 @@ cvtThumbMultiply(MCInst &Inst, unsigned Opcode, } ((ARMOperand*)Operands[3])->addRegOperands(Inst, 1); ((ARMOperand*)Operands[1])->addCCOutOperands(Inst, 1); - ((ARMOperand*)Operands[4])->addRegOperands(Inst, 1); - // If we have a three-operand form, use that, else the second source operand - // is just the destination operand again. - if (Operands.size() == 6) - ((ARMOperand*)Operands[5])->addRegOperands(Inst, 1); - else - Inst.addOperand(Inst.getOperand(0)); + // If we have a three-operand form, make sure to set Rn to be the operand + // that isn't the same as Rd. + unsigned RegOp = 4; + if (Operands.size() == 6 && + ((ARMOperand*)Operands[4])->getReg() == + ((ARMOperand*)Operands[3])->getReg()) + RegOp = 5; + ((ARMOperand*)Operands[RegOp])->addRegOperands(Inst, 1); + Inst.addOperand(Inst.getOperand(0)); ((ARMOperand*)Operands[2])->addCondCodeOperands(Inst, 2); return true; diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s index 0fa52b0987..6e830cd557 100644 --- a/test/MC/ARM/basic-thumb-instructions.s +++ b/test/MC/ARM/basic-thumb-instructions.s @@ -372,9 +372,11 @@ _func: @ MUL @------------------------------------------------------------------------------ muls r1, r2, r1 + muls r2, r2, r3 muls r3, r4 @ CHECK: muls r1, r2, r1 @ encoding: [0x51,0x43] +@ CHECK: muls r2, r3, r2 @ encoding: [0x5a,0x43] @ CHECK: muls r3, r4, r3 @ encoding: [0x63,0x43] |