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| author | Alexey Volkov <avolkov.intel@gmail.com> | 2014-04-01 08:13:07 +0000 |
|---|---|---|
| committer | Alexey Volkov <avolkov.intel@gmail.com> | 2014-04-01 08:13:07 +0000 |
| commit | 1d75829ddcb3d2f926f378949e79a77381eb2382 (patch) | |
| tree | 44d3fa64825fd296f377c29bb298f456f21906bc | |
| parent | a07c1ab4e6870af37eb183c46765dd1057c00b63 (diff) | |
| download | llvm-1d75829ddcb3d2f926f378949e79a77381eb2382.tar.gz llvm-1d75829ddcb3d2f926f378949e79a77381eb2382.tar.bz2 llvm-1d75829ddcb3d2f926f378949e79a77381eb2382.tar.xz | |
[x86] Do not convert to cmp32 for Atom arch by Sergey Okunev
Differential Revision: http://llvm-reviews.chandlerc.com/D2824
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205288 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 10 | ||||
| -rw-r--r-- | test/CodeGen/X86/atom-cmpb.ll | 36 |
2 files changed, 42 insertions, 4 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 630fba0151..cd7714df25 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -9810,12 +9810,14 @@ SDValue X86TargetLowering::EmitCmp(SDValue Op0, SDValue Op1, unsigned X86CC, if ((Op0.getValueType() == MVT::i8 || Op0.getValueType() == MVT::i16 || Op0.getValueType() == MVT::i32 || Op0.getValueType() == MVT::i64)) { - // Do the comparison at i32 if it's smaller. This avoids subregister - // aliasing issues. Keep the smaller reference if we're optimizing for - // size, however, as that'll allow better folding of memory operations. + // Do the comparison at i32 if it's smaller, besides the Atom case. + // This avoids subregister aliasing issues. Keep the smaller reference + // if we're optimizing for size, however, as that'll allow better folding + // of memory operations. if (Op0.getValueType() != MVT::i32 && Op0.getValueType() != MVT::i64 && !DAG.getMachineFunction().getFunction()->getAttributes().hasAttribute( - AttributeSet::FunctionIndex, Attribute::MinSize)) { + AttributeSet::FunctionIndex, Attribute::MinSize) && + !Subtarget->isAtom()) { unsigned ExtendOp = isX86CCUnsigned(X86CC) ? ISD::ZERO_EXTEND : ISD::SIGN_EXTEND; Op0 = DAG.getNode(ExtendOp, dl, MVT::i32, Op0); diff --git a/test/CodeGen/X86/atom-cmpb.ll b/test/CodeGen/X86/atom-cmpb.ll new file mode 100644 index 0000000000..034bf2f27d --- /dev/null +++ b/test/CodeGen/X86/atom-cmpb.ll @@ -0,0 +1,36 @@ +; RUN: llc < %s -march=x86 -mcpu=atom | FileCheck %s +; CHECK: movl +; CHECK: movb +; CHECK: movb +; CHECK: cmpb +; CHECK: notb +; CHECK: notb + +; Test for checking of cancel conversion to cmp32 in Atom case +; in function 'X86TargetLowering::EmitCmp' + +define i8 @run_test(i8* %rd_p) { +entry: + %incdec.ptr = getelementptr inbounds i8* %rd_p, i64 1 + %ld1 = load i8* %rd_p, align 1 + %incdec.ptr1 = getelementptr inbounds i8* %rd_p, i64 2 + %ld2 = load i8* %incdec.ptr, align 1 + %x4 = xor i8 %ld1, -1 + %x5 = xor i8 %ld2, -1 + %cmp34 = icmp ult i8 %ld2, %ld1 + br i1 %cmp34, label %if.then3, label %if.else + +if.then3: + %sub7 = sub i8 %x4, %x5 + br label %if.end4 + +if.else: + %sub8 = sub i8 %x5, %x4 + br label %if.end4 + +if.end4: + %res = phi i8 [ %sub7, %if.then3 ], [ %sub8, %if.else ] + ret i8 %res + +} + |