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authorNate Begeman <natebegeman@mac.com>2008-07-29 19:07:27 +0000
committerNate Begeman <natebegeman@mac.com>2008-07-29 19:07:27 +0000
commit24dc346a16397bf740d8d961cd1ebec8d2f46957 (patch)
tree1913044a315009c35273c12c087dcbaacfed85ae
parent6d399bdea269658a03b63de850595fbfdd487098 (diff)
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Fix broken CellSPU lowering, re-instate braces in Legalize
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54168 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeDAG.cpp6
-rw-r--r--lib/Target/CellSPU/SPUISelLowering.cpp5
2 files changed, 5 insertions, 6 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 8cdfcfa2ac..d8d45d04eb 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -2976,12 +2976,10 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
case TargetLowering::Legal: break;
case TargetLowering::Custom:
Tmp1 = TLI.LowerOperation(Result, DAG);
- if (Tmp1.Val)
- // FIXME: these braces are correct, but breaks CellSPU codegen.
- //{
+ if (Tmp1.Val) {
Result = Tmp1;
break;
- //}
+ }
// Fall through if the custom lower can't deal with the operation
case TargetLowering::Expand: {
MVT VT = Op.getValueType();
diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp
index 2fd72511ba..5f621ed8ec 100644
--- a/lib/Target/CellSPU/SPUISelLowering.cpp
+++ b/lib/Target/CellSPU/SPUISelLowering.cpp
@@ -2481,8 +2481,9 @@ LowerByteImmed(SDValue Op, SelectionDAG &DAG) {
DAG.getNode(ISD::BUILD_VECTOR, VT, tcVec, tcVecSize));
}
}
-
- return SDValue();
+ // These operations (AND, OR, XOR) are legal, they just couldn't be custom
+ // lowered. Return the operation, rather than a null SDValue.
+ return Op;
}
//! Lower i32 multiplication