Fix const-correctness issues with the SrcValue handling in the

memory intrinsic expansion code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49666 91177308-0d34-0410-b5e6-96231b3b80d8

7 files changed, 28 insertions, 28 deletions

diff --git a/include/llvm/CodeGen/SelectionDAG.h b/include/llvm/CodeGen/SelectionDAG.h
index 8ea14a5dfd..390e44dc53 100644
--- a/include/llvm/CodeGen/SelectionDAG.h
+++ b/include/llvm/CodeGen/SelectionDAG.h
@@ -326,17 +326,17 @@ public:
   SDOperand getMemcpy(SDOperand Chain, SDOperand Dst, SDOperand Src,
                       SDOperand Size, unsigned Align,
                       bool AlwaysInline,
-                      Value *DstSV, uint64_t DstOff,
-                      Value *SrcSV, uint64_t SrcOff);
+                      const Value *DstSV, uint64_t DstOff,
+                      const Value *SrcSV, uint64_t SrcOff);
 
   SDOperand getMemmove(SDOperand Chain, SDOperand Dst, SDOperand Src,
                       SDOperand Size, unsigned Align,
-                      Value *DstSV, uint64_t DstOff,
-                      Value *SrcSV, uint64_t SrcOff);
+                      const Value *DstSV, uint64_t DstOff,
+                      const Value *SrcSV, uint64_t SrcOff);
 
   SDOperand getMemset(SDOperand Chain, SDOperand Dst, SDOperand Src,
                       SDOperand Size, unsigned Align,
-                      Value *DstSV, uint64_t DstOff);
+                      const Value *DstSV, uint64_t DstOff);
 
   /// getSetCC - Helper function to make it easier to build SetCC's if you just
   /// have an ISD::CondCode instead of an SDOperand.
diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index f64ffe2194..a105ce6960 100644
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -967,8 +967,8 @@ public:
                           SDOperand Op1, SDOperand Op2,
                           SDOperand Op3, unsigned Align,
                           bool AlwaysInline,
-                          Value *DstSV, uint64_t DstOff,
-                          Value *SrcSV, uint64_t SrcOff) {
+                          const Value *DstSV, uint64_t DstOff,
+                          const Value *SrcSV, uint64_t SrcOff) {
     return SDOperand();
   }
 
@@ -983,8 +983,8 @@ public:
                            SDOperand Chain,
                            SDOperand Op1, SDOperand Op2,
                            SDOperand Op3, unsigned Align,
-                           Value *DstSV, uint64_t DstOff,
-                           Value *SrcSV, uint64_t SrcOff) {
+                           const Value *DstSV, uint64_t DstOff,
+                           const Value *SrcSV, uint64_t SrcOff) {
     return SDOperand();
   }
 
@@ -999,7 +999,7 @@ public:
                           SDOperand Chain,
                           SDOperand Op1, SDOperand Op2,
                           SDOperand Op3, unsigned Align,
-                          Value *DstSV, uint64_t DstOff) {
+                          const Value *DstSV, uint64_t DstOff) {
     return SDOperand();
   }
 
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 327a8fe897..a0f8697680 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2500,8 +2500,8 @@ static SDOperand getMemcpyLoadsAndStores(SelectionDAG &DAG,
                                          SDOperand Src, uint64_t Size,
                                          unsigned Align,
                                          bool AlwaysInline,
-                                         Value *DstSV, uint64_t DstOff,
-                                         Value *SrcSV, uint64_t SrcOff) {
+                                         const Value *DstSV, uint64_t DstOff,
+                                         const Value *SrcSV, uint64_t SrcOff) {
   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
 
   // Expand memcpy to a series of store ops if the size operand falls below
@@ -2573,7 +2573,7 @@ static SDOperand getMemsetStores(SelectionDAG &DAG,
                                  SDOperand Chain, SDOperand Dst,
                                  SDOperand Src, uint64_t Size,
                                  unsigned Align,
-                                 Value *DstSV, uint64_t DstOff) {
+                                 const Value *DstSV, uint64_t DstOff) {
   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
 
   // Expand memset to a series of load/store ops if the size operand
@@ -2604,8 +2604,8 @@ static SDOperand getMemsetStores(SelectionDAG &DAG,
 SDOperand SelectionDAG::getMemcpy(SDOperand Chain, SDOperand Dst,
                                   SDOperand Src, SDOperand Size,
                                   unsigned Align, bool AlwaysInline,
-                                  Value *DstSV, uint64_t DstOff,
-                                  Value *SrcSV, uint64_t SrcOff) {
+                                  const Value *DstSV, uint64_t DstOff,
+                                  const Value *SrcSV, uint64_t SrcOff) {
 
   // Check to see if we should lower the memcpy to loads and stores first.
   // For cases within the target-specified limits, this is the best choice.
@@ -2658,8 +2658,8 @@ SDOperand SelectionDAG::getMemcpy(SDOperand Chain, SDOperand Dst,
 SDOperand SelectionDAG::getMemmove(SDOperand Chain, SDOperand Dst,
                                    SDOperand Src, SDOperand Size,
                                    unsigned Align,
-                                   Value *DstSV, uint64_t DstOff,
-                                   Value *SrcSV, uint64_t SrcOff) {
+                                   const Value *DstSV, uint64_t DstOff,
+                                   const Value *SrcSV, uint64_t SrcOff) {
 
   // TODO: Optimize small memmove cases with simple loads and stores,
   // ensuring that all loads precede all stores. This can cause severe
@@ -2691,7 +2691,7 @@ SDOperand SelectionDAG::getMemmove(SDOperand Chain, SDOperand Dst,
 SDOperand SelectionDAG::getMemset(SDOperand Chain, SDOperand Dst,
                                   SDOperand Src, SDOperand Size,
                                   unsigned Align,
-                                  Value *DstSV, uint64_t DstOff) {
+                                  const Value *DstSV, uint64_t DstOff) {
 
   // Check to see if we should lower the memset to stores first.
   // For cases within the target-specified limits, this is the best choice.
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 0095352c41..6a581f715f 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -1247,8 +1247,8 @@ ARMTargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
                                            SDOperand Dst, SDOperand Src,
                                            SDOperand Size, unsigned Align,
                                            bool AlwaysInline,
-                                           Value *DstSV, uint64_t DstOff,
-                                           Value *SrcSV, uint64_t SrcOff){
+                                           const Value *DstSV, uint64_t DstOff,
+                                           const Value *SrcSV, uint64_t SrcOff){
   // Do repeated 4-byte loads and stores. To be improved.
   // This requires 4-byte alignment.
   if ((Align & 3) != 0)
diff --git a/lib/Target/ARM/ARMISelLowering.h b/lib/Target/ARM/ARMISelLowering.h
index 58d8d8c6c8..13f5c08375 100644
--- a/lib/Target/ARM/ARMISelLowering.h
+++ b/lib/Target/ARM/ARMISelLowering.h
@@ -149,8 +149,8 @@ namespace llvm {
                                       SDOperand Dst, SDOperand Src,
                                       SDOperand Size, unsigned Align,
                                       bool AlwaysInline,
-                                      Value *DstSV, uint64_t DstOff,
-                                      Value *SrcSV, uint64_t SrcOff);
+                                      const Value *DstSV, uint64_t DstOff,
+                                      const Value *SrcSV, uint64_t SrcOff);
   };
 }
 
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index ac58ab4f05..38e6342ae6 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4664,7 +4664,7 @@ X86TargetLowering::EmitTargetCodeForMemset(SelectionDAG &DAG,
                                            SDOperand Chain,
                                            SDOperand Dst, SDOperand Src,
                                            SDOperand Size, unsigned Align,
-                                           Value *DstSV, uint64_t DstOff) {
+                                           const Value *DstSV, uint64_t DstOff) {
   ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
 
   /// If not DWORD aligned or size is more than the threshold, call the library.
@@ -4804,8 +4804,8 @@ X86TargetLowering::EmitTargetCodeForMemcpy(SelectionDAG &DAG,
                                            SDOperand Dst, SDOperand Src,
                                            SDOperand Size, unsigned Align,
                                            bool AlwaysInline,
-                                           Value *DstSV, uint64_t DstOff,
-                                           Value *SrcSV, uint64_t SrcOff){
+                                           const Value *DstSV, uint64_t DstOff,
+                                           const Value *SrcSV, uint64_t SrcOff){
   
   // This requires the copy size to be a constant, preferrably
   // within a subtarget-specific limit.
diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index fea2d2b357..e3000dbc2c 100644
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -550,14 +550,14 @@ namespace llvm {
                                       SDOperand Chain,
                                       SDOperand Dst, SDOperand Src,
                                       SDOperand Size, unsigned Align,
-                                      Value *DstSV, uint64_t DstOff);
+                                      const Value *DstSV, uint64_t DstOff);
     SDOperand EmitTargetCodeForMemcpy(SelectionDAG &DAG,
                                       SDOperand Chain,
                                       SDOperand Dst, SDOperand Src,
                                       SDOperand Size, unsigned Align,
                                       bool AlwaysInline,
-                                      Value *DstSV, uint64_t DstOff,
-                                      Value *SrcSV, uint64_t SrcOff);
+                                      const Value *DstSV, uint64_t DstOff,
+                                      const Value *SrcSV, uint64_t SrcOff);
   };
 }