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author | Kevin Enderby <enderby@apple.com> | 2014-01-23 21:52:41 +0000 |
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committer | Kevin Enderby <enderby@apple.com> | 2014-01-23 21:52:41 +0000 |
commit | 2f49a7b24b4adfed31855edeb9d1b3f0386c188b (patch) | |
tree | b78339d918257fc6b9bb9e5fa4a7a0659e8dd662 | |
parent | 22221ee0e33b6b992aca34c80bf3bee1fc507ff6 (diff) | |
download | llvm-2f49a7b24b4adfed31855edeb9d1b3f0386c188b.tar.gz llvm-2f49a7b24b4adfed31855edeb9d1b3f0386c188b.tar.bz2 llvm-2f49a7b24b4adfed31855edeb9d1b3f0386c188b.tar.xz |
Update the X86 assembler for .intel_syntax to produce an error for invalid
scale factors in memory addresses. As it does for .att_syntax.
It was producing:
Assertion failed: (((Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8)) && "Invalid scale!"), function CreateMem, file /Volumes/SandBox/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp, line 1133.
rdar://14967214
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199942 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/AsmParser/X86AsmParser.cpp | 14 | ||||
-rw-r--r-- | test/MC/X86/intel-syntax-invalid-scale.s | 11 |
2 files changed, 22 insertions, 3 deletions
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index ff38e6f8ed..525d4cb331 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -391,7 +391,7 @@ private: break; } } - void onInteger(int64_t TmpInt) { + bool onInteger(int64_t TmpInt, StringRef &ErrMsg) { IntelExprState CurrState = State; switch (State) { default: @@ -410,6 +410,10 @@ private: assert (!IndexReg && "IndexReg already set!"); IndexReg = TmpReg; Scale = TmpInt; + if(Scale != 1 && Scale != 2 && Scale != 4 && Scale != 8) { + ErrMsg = "scale factor in address must be 1, 2, 4 or 8"; + return true; + } // Get the scale and replace the 'Register * Scale' with '0'. IC.popOperator(); } else if ((PrevState == IES_PLUS || PrevState == IES_MINUS || @@ -426,6 +430,7 @@ private: break; } PrevState = CurrState; + return false; } void onStar() { PrevState = State; @@ -1465,6 +1470,7 @@ bool X86AsmParser::ParseIntelExpression(IntelExprStateMachine &SM, SMLoc &End) { return Error(Tok.getLoc(), "Unexpected identifier!"); } case AsmToken::Integer: { + StringRef ErrMsg; if (isParsingInlineAsm() && SM.getAddImmPrefix()) InstInfo->AsmRewrites->push_back(AsmRewrite(AOK_ImmPrefix, Tok.getLoc())); @@ -1488,10 +1494,12 @@ bool X86AsmParser::ParseIntelExpression(IntelExprStateMachine &SM, SMLoc &End) { SM.onIdentifierExpr(Val, Identifier); End = consumeToken(); } else { - SM.onInteger(IntVal); + if (SM.onInteger(IntVal, ErrMsg)) + return Error(Loc, ErrMsg); } } else { - SM.onInteger(IntVal); + if (SM.onInteger(IntVal, ErrMsg)) + return Error(Loc, ErrMsg); } break; } diff --git a/test/MC/X86/intel-syntax-invalid-scale.s b/test/MC/X86/intel-syntax-invalid-scale.s new file mode 100644 index 0000000000..69c6add06d --- /dev/null +++ b/test/MC/X86/intel-syntax-invalid-scale.s @@ -0,0 +1,11 @@ +// RUN: not llvm-mc -triple x86_64-unknown-unknown %s 2> %t.err +// RUN: FileCheck < %t.err %s + +.intel_syntax + +// CHECK: error: scale factor in address must be 1, 2, 4 or 8 + lea rax, [rdi + rdx*64] +// CHECK: error: scale factor in address must be 1, 2, 4 or 8 + lea rax, [rdi + rdx*32] +// CHECK: error: scale factor in address must be 1, 2, 4 or 8 + lea rax, [rdi + rdx*16] |