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author | Kevin Enderby <enderby@apple.com> | 2010-05-28 19:01:27 +0000 |
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committer | Kevin Enderby <enderby@apple.com> | 2010-05-28 19:01:27 +0000 |
commit | 31b6c5b2f3118ba8ab9366ecf37085a26be6db97 (patch) | |
tree | 3fa3a796b7dec9a789c9efea2fbe063410b822cb | |
parent | 9d8d221a6864872a3b5c272e83adbf18f3c6a1af (diff) | |
download | llvm-31b6c5b2f3118ba8ab9366ecf37085a26be6db97.tar.gz llvm-31b6c5b2f3118ba8ab9366ecf37085a26be6db97.tar.bz2 llvm-31b6c5b2f3118ba8ab9366ecf37085a26be6db97.tar.xz |
Fix the use of x86 control and debug registers so that the assertion failure in
getX86RegNum() does not happen. Patch by Shantonu Sen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104994 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86RegisterInfo.cpp | 28 | ||||
-rw-r--r-- | test/MC/AsmParser/X86/x86_32-new-encoder.s | 57 |
2 files changed, 85 insertions, 0 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index 98975ea01b..d31c52100d 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -157,6 +157,34 @@ unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) { case X86::GS: return 5; + case X86::CR0: + return 0; + case X86::CR1: + return 1; + case X86::CR2: + return 2; + case X86::CR3: + return 3; + case X86::CR4: + return 4; + + case X86::DR0: + return 0; + case X86::DR1: + return 1; + case X86::DR2: + return 2; + case X86::DR3: + return 3; + case X86::DR4: + return 4; + case X86::DR5: + return 5; + case X86::DR6: + return 6; + case X86::DR7: + return 7; + default: assert(isVirtualRegister(RegNo) && "Unknown physical register!"); llvm_unreachable("Register allocator hasn't allocated reg correctly yet!"); diff --git a/test/MC/AsmParser/X86/x86_32-new-encoder.s b/test/MC/AsmParser/X86/x86_32-new-encoder.s index 0b7d32718a..ab3521e71e 100644 --- a/test/MC/AsmParser/X86/x86_32-new-encoder.s +++ b/test/MC/AsmParser/X86/x86_32-new-encoder.s @@ -331,3 +331,60 @@ retl // CHECK: movw (%eax), %cs // CHECK: encoding: [0x66,0x8e,0x08] movw (%eax), %cs + +// radr://8033374 +// CHECK: movl %cr0, %eax +// CHECK: encoding: [0x0f,0x20,0xc0] + movl %cr0,%eax + +// CHECK: movl %cr1, %eax +// CHECK: encoding: [0x0f,0x20,0xc8] + movl %cr1,%eax + +// CHECK: movl %cr2, %eax +// CHECK: encoding: [0x0f,0x20,0xd0] + movl %cr2,%eax + +// CHECK: movl %cr3, %eax +// CHECK: encoding: [0x0f,0x20,0xd8] + movl %cr3,%eax + +// CHECK: movl %cr4, %eax +// CHECK: encoding: [0x0f,0x20,0xe0] + movl %cr4,%eax + +// CHECK: movl %dr0, %eax +// CHECK: encoding: [0x0f,0x21,0xc0] + movl %dr0,%eax + +// CHECK: movl %dr1, %eax +// CHECK: encoding: [0x0f,0x21,0xc8] + movl %dr1,%eax + +// CHECK: movl %dr1, %eax +// CHECK: encoding: [0x0f,0x21,0xc8] + movl %dr1,%eax + +// CHECK: movl %dr2, %eax +// CHECK: encoding: [0x0f,0x21,0xd0] + movl %dr2,%eax + +// CHECK: movl %dr3, %eax +// CHECK: encoding: [0x0f,0x21,0xd8] + movl %dr3,%eax + +// CHECK: movl %dr4, %eax +// CHECK: encoding: [0x0f,0x21,0xe0] + movl %dr4,%eax + +// CHECK: movl %dr5, %eax +// CHECK: encoding: [0x0f,0x21,0xe8] + movl %dr5,%eax + +// CHECK: movl %dr6, %eax +// CHECK: encoding: [0x0f,0x21,0xf0] + movl %dr6,%eax + +// CHECK: movl %dr7, %eax +// CHECK: encoding: [0x0f,0x21,0xf8] + movl %dr7,%eax |