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| author | Chris Lattner <sabre@nondot.org> | 2010-12-20 01:16:03 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-12-20 01:16:03 +0000 |
| commit | 39ffcb7b62a75d186a7f14b38aacb1615593fdbd (patch) | |
| tree | e0c8ecf39907ca5a0ffe62d2284762805c7459fa | |
| parent | b085181258bf2566e7b58389591acc213b0b2927 (diff) | |
| download | llvm-39ffcb7b62a75d186a7f14b38aacb1615593fdbd.tar.gz llvm-39ffcb7b62a75d186a7f14b38aacb1615593fdbd.tar.bz2 llvm-39ffcb7b62a75d186a7f14b38aacb1615593fdbd.tar.xz | |
We lower setb to sbb with the hope that the and will go away, when it
doesn't, match it back to setb.
On a 64-bit version of the testcase before we'd get:
movq %rdi, %rax
addq %rsi, %rax
sbbb %dl, %dl
andb $1, %dl
ret
now we get:
movq %rdi, %rax
addq %rsi, %rax
setb %dl
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122217 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrCompiler.td | 6 | ||||
| -rw-r--r-- | test/CodeGen/X86/add.ll | 9 |
2 files changed, 15 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrCompiler.td b/lib/Target/X86/X86InstrCompiler.td index 724e6b895e..da5e05a5d7 100644 --- a/lib/Target/X86/X86InstrCompiler.td +++ b/lib/Target/X86/X86InstrCompiler.td @@ -207,6 +207,12 @@ def : Pat<(i32 (sext (i8 (X86setcc_c X86_COND_B, EFLAGS)))), def : Pat<(i64 (sext (i8 (X86setcc_c X86_COND_B, EFLAGS)))), (SETB_C64r)>; +// We canonicalize 'setb' to "(and (sbb reg,reg), 1)" on the hope that the and +// will be eliminated and that the sbb can be extended up to a wider type. When +// this happens, it is great. However, if we are left with an 8-bit sbb and an +// and, we might as well just match it as a setb. +def : Pat<(and (i8 (X86setcc_c X86_COND_B, EFLAGS)), 1), + (SETBr)>; //===----------------------------------------------------------------------===// // String Pseudo Instructions diff --git a/test/CodeGen/X86/add.ll b/test/CodeGen/X86/add.ll index 3991a6849f..1201c06fcc 100644 --- a/test/CodeGen/X86/add.ll +++ b/test/CodeGen/X86/add.ll @@ -92,3 +92,12 @@ define i64 @test6(i64 %A, i32 %B) nounwind { ; X64: ret } +define {i32, i1} @test7(i32 %v1, i32 %v2) nounwind { + %t = call {i32, i1} @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2) + ret {i32, i1} %t +} + +; X64: test7: +; X64: addl %esi, %eax +; X64-NEXT: setb %dl +; X64-NEXT: ret |