summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorEric Christopher <echristo@gmail.com>2013-11-04 21:41:21 +0000
committerEric Christopher <echristo@gmail.com>2013-11-04 21:41:21 +0000
commit3faf43fc66fd162e722e81d5bba334c1debc97d2 (patch)
tree958c271d999b70fc6fdcc1be9168b67f00f77496
parent63d8f88686e9bde3b6ee94f24c2ab1d4e1df3e4a (diff)
downloadllvm-3faf43fc66fd162e722e81d5bba334c1debc97d2.tar.gz
llvm-3faf43fc66fd162e722e81d5bba334c1debc97d2.tar.bz2
llvm-3faf43fc66fd162e722e81d5bba334c1debc97d2.tar.xz
Check for both styles of clobbers, those produced by dragonegg and
those produced by clang for the inline asm bswap conversion. Modified from a patch by Chris Smowton. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194016 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp30
-rw-r--r--test/CodeGen/X86/inline-asm-flag-clobber.ll31
2 files changed, 41 insertions, 20 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 7648ddc681..86ad2621fb 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -19182,6 +19182,22 @@ namespace {
const VariadicFunction1<bool, StringRef, StringRef, matchAsmImpl> matchAsm={};
}
+static bool clobbersFlagRegisters(const SmallVector<StringRef, 4> &AsmPieces) {
+
+ if (AsmPieces.size() == 3 || AsmPieces.size() == 4) {
+ if (std::count(AsmPieces.begin(), AsmPieces.end(), "~{cc}") &&
+ std::count(AsmPieces.begin(), AsmPieces.end(), "~{flags}") &&
+ std::count(AsmPieces.begin(), AsmPieces.end(), "~{fpsr}")) {
+
+ if (AsmPieces.size() == 3)
+ return true;
+ else if (std::count(AsmPieces.begin(), AsmPieces.end(), "~{dirflag}"))
+ return true;
+ }
+ }
+ return false;
+}
+
bool X86TargetLowering::ExpandInlineAsm(CallInst *CI) const {
InlineAsm *IA = cast<InlineAsm>(CI->getCalledValue());
@@ -19223,12 +19239,8 @@ bool X86TargetLowering::ExpandInlineAsm(CallInst *CI) const {
const std::string &ConstraintsStr = IA->getConstraintString();
SplitString(StringRef(ConstraintsStr).substr(5), AsmPieces, ",");
array_pod_sort(AsmPieces.begin(), AsmPieces.end());
- if (AsmPieces.size() == 4 &&
- AsmPieces[0] == "~{cc}" &&
- AsmPieces[1] == "~{dirflag}" &&
- AsmPieces[2] == "~{flags}" &&
- AsmPieces[3] == "~{fpsr}")
- return IntrinsicLowering::LowerToByteSwap(CI);
+ if (clobbersFlagRegisters(AsmPieces))
+ return IntrinsicLowering::LowerToByteSwap(CI);
}
break;
case 3:
@@ -19241,11 +19253,7 @@ bool X86TargetLowering::ExpandInlineAsm(CallInst *CI) const {
const std::string &ConstraintsStr = IA->getConstraintString();
SplitString(StringRef(ConstraintsStr).substr(5), AsmPieces, ",");
array_pod_sort(AsmPieces.begin(), AsmPieces.end());
- if (AsmPieces.size() == 4 &&
- AsmPieces[0] == "~{cc}" &&
- AsmPieces[1] == "~{dirflag}" &&
- AsmPieces[2] == "~{flags}" &&
- AsmPieces[3] == "~{fpsr}")
+ if (clobbersFlagRegisters(AsmPieces))
return IntrinsicLowering::LowerToByteSwap(CI);
}
diff --git a/test/CodeGen/X86/inline-asm-flag-clobber.ll b/test/CodeGen/X86/inline-asm-flag-clobber.ll
index 51ea843712..45f4d2f38a 100644
--- a/test/CodeGen/X86/inline-asm-flag-clobber.ll
+++ b/test/CodeGen/X86/inline-asm-flag-clobber.ll
@@ -2,18 +2,31 @@
; PR3701
define i64 @t(i64* %arg) nounwind {
- br i1 true, label %1, label %5
+ br i1 true, label %1, label %5
-; <label>:1 ; preds = %0
- %2 = icmp eq i64* null, %arg ; <i1> [#uses=1]
- %3 = tail call i64* asm sideeffect "movl %fs:0,$0", "=r,~{dirflag},~{fpsr},~{flags}"() nounwind ; <%struct.thread*> [#uses=0]
+; <label>:1 ; preds = %0
+ %2 = icmp eq i64* null, %arg ; <i1> [#uses=1]
+ %3 = tail call i64* asm sideeffect "movl %fs:0,$0", "=r,~{dirflag},~{fpsr},~{flags}"() nounwind ; <%struct.thread*> [#uses=0]
; CHECK: test
; CHECK-NEXT: j
- br i1 %2, label %4, label %5
+ br i1 %2, label %4, label %5
-; <label>:4 ; preds = %1
- ret i64 1
+; <label>:4 ; preds = %1
+ ret i64 1
-; <label>:5 ; preds = %1
- ret i64 0
+; <label>:5 ; preds = %1
+ ret i64 0
}
+
+; Make sure that we translate this to the bswap intrinsic which lowers down without the
+; inline assembly.
+; CHECK-NOT: #APP
+define i32 @s(i32 %argc, i8** nocapture %argv) unnamed_addr nounwind {
+entry:
+ %0 = trunc i32 %argc to i16
+ %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{fpsr},~{flags},~{cc}"(i16 %0) nounwind, !srcloc !0
+ %1 = zext i16 %asmtmp to i32
+ ret i32 %1
+}
+
+!0 = metadata !{i64 935930}