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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-08-24 20:21:49 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-08-24 20:21:49 +0000 |
| commit | 45d8dbc92d365e9c0a08ceb0bc7a9014e6064bdb (patch) | |
| tree | a4cf62db30e1b44c00a4f0d1a3fd8921009ebf16 | |
| parent | 6adeb67b33d718767ff25e935fbfafff8e5584e0 (diff) | |
| download | llvm-45d8dbc92d365e9c0a08ceb0bc7a9014e6064bdb.tar.gz llvm-45d8dbc92d365e9c0a08ceb0bc7a9014e6064bdb.tar.bz2 llvm-45d8dbc92d365e9c0a08ceb0bc7a9014e6064bdb.tar.xz | |
In MipsDAGToDAGISel::SelectAddr, fold add node into address operand, if its
second operand is MipsISD::GPRel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162584 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Mips/MipsISelDAGToDAG.cpp | 5 | ||||
| -rw-r--r-- | test/CodeGen/Mips/small-section-reserve-gp.ll | 2 |
2 files changed, 4 insertions, 3 deletions
diff --git a/lib/Target/Mips/MipsISelDAGToDAG.cpp b/lib/Target/Mips/MipsISelDAGToDAG.cpp index 5a97c17ec8..4205223923 100644 --- a/lib/Target/Mips/MipsISelDAGToDAG.cpp +++ b/lib/Target/Mips/MipsISelDAGToDAG.cpp @@ -337,8 +337,9 @@ SelectAddr(SDNode *Parent, SDValue Addr, SDValue &Base, SDValue &Offset) { // Generate: // lui $2, %hi($CPI1_0) // lwc1 $f0, %lo($CPI1_0)($2) - if (Addr.getOperand(1).getOpcode() == MipsISD::Lo) { - SDValue LoVal = Addr.getOperand(1), Opnd0 = LoVal.getOperand(0); + if (Addr.getOperand(1).getOpcode() == MipsISD::Lo || + Addr.getOperand(1).getOpcode() == MipsISD::GPRel) { + SDValue Opnd0 = Addr.getOperand(1).getOperand(0); if (isa<ConstantPoolSDNode>(Opnd0) || isa<GlobalAddressSDNode>(Opnd0) || isa<JumpTableSDNode>(Opnd0)) { Base = Addr.getOperand(0); diff --git a/test/CodeGen/Mips/small-section-reserve-gp.ll b/test/CodeGen/Mips/small-section-reserve-gp.ll index fc251cb612..03503fb2ae 100644 --- a/test/CodeGen/Mips/small-section-reserve-gp.ll +++ b/test/CodeGen/Mips/small-section-reserve-gp.ll @@ -5,7 +5,7 @@ define i32 @geti() nounwind readonly { entry: -; CHECK: addiu ${{[0-9]+}}, $gp, %gp_rel(i) +; CHECK: lw ${{[0-9]+}}, %gp_rel(i)($gp) %0 = load i32* @i, align 4 ret i32 %0 } |