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| author | Craig Topper <craig.topper@gmail.com> | 2011-10-23 00:33:32 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2011-10-23 00:33:32 +0000 |
| commit | 4fea38f7732bccd1781390aedcef2bbf87e25990 (patch) | |
| tree | 19ee47f628ea164f377975093f2a97327f2b16ab | |
| parent | 272895f0ab2752c0d117a60259a9bb82db1fdee5 (diff) | |
| download | llvm-4fea38f7732bccd1781390aedcef2bbf87e25990.tar.gz llvm-4fea38f7732bccd1781390aedcef2bbf87e25990.tar.bz2 llvm-4fea38f7732bccd1781390aedcef2bbf87e25990.tar.xz | |
Add X86 MULX instruction for disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142738 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrArithmetic.td | 24 | ||||
| -rw-r--r-- | test/MC/Disassembler/X86/simple-tests.txt | 12 | ||||
| -rw-r--r-- | test/MC/Disassembler/X86/x86-32.txt | 12 |
3 files changed, 48 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrArithmetic.td b/lib/Target/X86/X86InstrArithmetic.td index 6c49b9ec06..c99c52d477 100644 --- a/lib/Target/X86/X86InstrArithmetic.td +++ b/lib/Target/X86/X86InstrArithmetic.td @@ -1171,3 +1171,27 @@ let Predicates = [HasBMI], Defs = [EFLAGS] in { defm ANDN32 : bmi_andn<"andn{l}", GR32, i32mem, loadi32>, T8, VEX_4V; defm ANDN64 : bmi_andn<"andn{q}", GR64, i64mem, loadi64>, T8, VEX_4V, VEX_W; } + +//===----------------------------------------------------------------------===// +// MULX Instruction +// +multiclass bmi_mulx<string mnemonic, RegisterClass RC, X86MemOperand x86memop> { +let neverHasSideEffects = 1 in { + let isCommutable = 1 in + def rr : I<0xF6, MRMSrcReg, (outs RC:$dst1, RC:$dst2), (ins RC:$src), + !strconcat(mnemonic, "\t{$src, $dst2, $dst1|$dst1, $dst2, $src}"), + []>, T8XD, VEX_4V; + + let mayLoad = 1 in + def rm : I<0xF6, MRMSrcMem, (outs RC:$dst1, RC:$dst2), (ins x86memop:$src), + !strconcat(mnemonic, "\t{$src, $dst2, $dst1|$dst1, $dst2, $src}"), + []>, T8XD, VEX_4V; +} +} + +let Predicates = [HasBMI2] in { + let Uses = [EDX] in + defm MULX32 : bmi_mulx<"mulx{l}", GR32, i32mem>; + let Uses = [RDX] in + defm MULX64 : bmi_mulx<"mulx{q}", GR64, i64mem>, VEX_W; +} diff --git a/test/MC/Disassembler/X86/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt index 37cde91be5..23c30f8f45 100644 --- a/test/MC/Disassembler/X86/simple-tests.txt +++ b/test/MC/Disassembler/X86/simple-tests.txt @@ -587,3 +587,15 @@ # CHECK: pdepq (%rax), %r11, %r10 0xc4 0x62 0xa3 0xf5 0x10 + +# CHECK: mulxl %r12d, %r11d, %r10d +0xc4 0x42 0x23 0xf6 0xd4 + +# CHECK: mulxl (%rax), %r11d, %r10d +0xc4 0x62 0x23 0xf6 0x10 + +# CHECK: mulxq %r12, %r11, %r10 +0xc4 0x42 0xa3 0xf6 0xd4 + +# CHECK: mulxq (%rax), %r11, %r10 +0xc4 0x62 0xa3 0xf6 0x10 diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt index 51901a53c5..b01c4eff5c 100644 --- a/test/MC/Disassembler/X86/x86-32.txt +++ b/test/MC/Disassembler/X86/x86-32.txt @@ -531,3 +531,15 @@ # CHECK: pdepl (%eax), %ecx, %edx 0xc4 0xe2 0x73 0xf5 0x10 + +# CHECK: mulxl %esp, %ecx, %edx +0xc4 0xe2 0x73 0xf6 0xd4 + +# CHECK: mulxl (%eax), %ecx, %edx +0xc4 0xe2 0x73 0xf6 0x10 + +# CHECK: mulxl %esp, %ecx, %edx +0xc4 0xe2 0xf3 0xf6 0xd4 + +# CHECK: mulxl (%eax), %ecx, %edx +0xc4 0xe2 0xf3 0xf6 0x10 |