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| author | David Woodhouse <dwmw2@infradead.org> | 2014-01-08 12:58:36 +0000 |
|---|---|---|
| committer | David Woodhouse <dwmw2@infradead.org> | 2014-01-08 12:58:36 +0000 |
| commit | 51a64502bf337a2bd650f2612362363701f25441 (patch) | |
| tree | 9a7329860863b2304a827e0346ad122830bc70ba | |
| parent | 2634d1f6da25827035b2c71fb8b5c744da5b3872 (diff) | |
| download | llvm-51a64502bf337a2bd650f2612362363701f25441.tar.gz llvm-51a64502bf337a2bd650f2612362363701f25441.tar.bz2 llvm-51a64502bf337a2bd650f2612362363701f25441.tar.xz | |
[x86] Add JMP_2 and other 16-bit PC-relative branch instructions
Mark them as requiring 16-bit mode for now, since we don't yet have
relaxation support for FK_Data_2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198762 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrControl.td | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrControl.td b/lib/Target/X86/X86InstrControl.td index 1e420f8be9..b87c4cee13 100644 --- a/lib/Target/X86/X86InstrControl.td +++ b/lib/Target/X86/X86InstrControl.td @@ -52,6 +52,9 @@ let isTerminator = 1, isReturn = 1, isBarrier = 1, let isBarrier = 1, isBranch = 1, isTerminator = 1, SchedRW = [WriteJump] in { def JMP_4 : Ii32PCRel<0xE9, RawFrm, (outs), (ins brtarget:$dst), "jmp\t$dst", [(br bb:$dst)], IIC_JMP_REL>, OpSize16; + def JMP_2 : Ii16PCRel<0xE9, RawFrm, (outs), (ins brtarget:$dst), + "jmp\t$dst", [(br bb:$dst)], IIC_JMP_REL>, OpSize, + Requires<[In16BitMode]>; let hasSideEffects = 0 in def JMP_1 : Ii8PCRel<0xEB, RawFrm, (outs), (ins brtarget8:$dst), "jmp\t$dst", [], IIC_JMP_REL>; @@ -63,6 +66,9 @@ let isBranch = 1, isTerminator = 1, Uses = [EFLAGS], SchedRW = [WriteJump] in { let hasSideEffects = 0 in def _1 : Ii8PCRel <opc1, RawFrm, (outs), (ins brtarget8:$dst), asm, [], IIC_Jcc>; + def _2 : Ii16PCRel<opc4, RawFrm, (outs), (ins brtarget:$dst), asm, + [(X86brcond bb:$dst, Cond, EFLAGS)], IIC_Jcc>, OpSize, + TB, Requires<[In16BitMode]>; def _4 : Ii32PCRel<opc4, RawFrm, (outs), (ins brtarget:$dst), asm, [(X86brcond bb:$dst, Cond, EFLAGS)], IIC_Jcc>, TB, OpSize16; |