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author | Jim Grosbach <grosbach@apple.com> | 2010-09-02 16:31:21 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2010-09-02 16:31:21 +0000 |
commit | 5a0fabae5a1792d20df23b6cbd573a9121637d12 (patch) | |
tree | 95920d6e4c94d795141b8b41a3bfac9317043d5f | |
parent | 82a9c8480ecd41a1351274569f8d4e4de2723cf6 (diff) | |
download | llvm-5a0fabae5a1792d20df23b6cbd573a9121637d12.tar.gz llvm-5a0fabae5a1792d20df23b6cbd573a9121637d12.tar.bz2 llvm-5a0fabae5a1792d20df23b6cbd573a9121637d12.tar.xz |
Mask out reserved registers when constructing the set of allocatable regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112828 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/TargetRegisterInfo.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/TargetRegisterInfo.cpp b/lib/Target/TargetRegisterInfo.cpp index 49bfad5413..cdbe51fbdd 100644 --- a/lib/Target/TargetRegisterInfo.cpp +++ b/lib/Target/TargetRegisterInfo.cpp @@ -80,6 +80,11 @@ BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF, for (TargetRegisterInfo::regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I) getAllocatableSetForRC(MF, *I, Allocatable); + + // Mask out the reserved registers + BitVector Reserved = getReservedRegs(MF); + Allocatable ^= Reserved & Allocatable; + return Allocatable; } |