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| author | Chris Lattner <sabre@nondot.org> | 2004-09-28 18:38:01 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2004-09-28 18:38:01 +0000 |
| commit | 5b71d3af35f941585acb50de4909cff20f68680d (patch) | |
| tree | d944e81aa58c0d5255abe2078a4e9254b85a0a32 | |
| parent | 49db6fe193168239be2f5aa8b4201614b739e840 (diff) | |
| download | llvm-5b71d3af35f941585acb50de4909cff20f68680d.tar.gz llvm-5b71d3af35f941585acb50de4909cff20f68680d.tar.bz2 llvm-5b71d3af35f941585acb50de4909cff20f68680d.tar.xz | |
Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16553 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | utils/TableGen/CodeGenInstruction.h | 1 | ||||
| -rw-r--r-- | utils/TableGen/CodeGenTarget.cpp | 1 | ||||
| -rw-r--r-- | utils/TableGen/InstrInfoEmitter.cpp | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h index 5e6af31635..8551a55308 100644 --- a/utils/TableGen/CodeGenInstruction.h +++ b/utils/TableGen/CodeGenInstruction.h @@ -73,6 +73,7 @@ namespace llvm { bool isCall; bool isTwoAddress; bool isTerminator; + bool hasDelaySlot; CodeGenInstruction(Record *R, const std::string &AsmStr); diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index 49fd772d2e..ba214051cd 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -197,6 +197,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr) isCall = R->getValueAsBit("isCall"); isTwoAddress = R->getValueAsBit("isTwoAddress"); isTerminator = R->getValueAsBit("isTerminator"); + hasDelaySlot = R->getValueAsBit("hasDelaySlot"); try { DagInit *DI = R->getValueAsDag("OperandList"); diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index 0596f439cf..c02eda13c5 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -111,6 +111,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, if (Inst.isReturn) OS << "|M_RET_FLAG"; if (Inst.isBranch) OS << "|M_BRANCH_FLAG"; if (Inst.isBarrier) OS << "|M_BARRIER_FLAG"; + if (Inst.hasDelaySlot) OS << "|M_DELAY_SLOT_FLAG"; if (Inst.isCall) OS << "|M_CALL_FLAG"; if (Inst.isTwoAddress) OS << "|M_2_ADDR_FLAG"; if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG"; |