Refactor code. Remove duplicated functions that basically do the same thing as

findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47927 91177308-0d34-0410-b5e6-96231b3b80d8

16 files changed, 170 insertions, 187 deletions

diff --git a/include/llvm/CodeGen/LiveVariables.h b/include/llvm/CodeGen/LiveVariables.h
index b4f0db4c89..859ec94e44 100644
--- a/include/llvm/CodeGen/LiveVariables.h
+++ b/include/llvm/CodeGen/LiveVariables.h
@@ -130,7 +130,7 @@ private:
 private:   // Intermediate data structures
   MachineFunction *MF;
 
-  const TargetRegisterInfo *RegInfo;
+  const TargetRegisterInfo *TRI;
 
   // PhysRegInfo - Keep track of which instruction was the last def/use of a
   // physical register. This is a purely local property, because all physical
@@ -175,18 +175,10 @@ public:
 
   virtual bool runOnMachineFunction(MachineFunction &MF);
 
-  /// KillsRegister - Return true if the specified instruction kills the
-  /// specified register.
-  bool KillsRegister(MachineInstr *MI, unsigned Reg) const;
-  
   /// RegisterDefIsDead - Return true if the specified instruction defines the
   /// specified register, but that definition is dead.
   bool RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const;
 
-  /// ModifiesRegister - Return true if the specified instruction modifies the
-  /// specified register.
-  bool ModifiesRegister(MachineInstr *MI, unsigned Reg) const;
-  
   //===--------------------------------------------------------------------===//
   //  API to update live variable information
 
@@ -202,7 +194,7 @@ public:
   /// not found.
   void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI,
                                 bool AddIfNotFound = false) {
-    if (MI->addRegisterKilled(IncomingReg, RegInfo, AddIfNotFound))
+    if (MI->addRegisterKilled(IncomingReg, TRI, AddIfNotFound))
       getVarInfo(IncomingReg).Kills.push_back(MI); 
   }
 
@@ -239,7 +231,7 @@ public:
   /// AddIfNotFound is true, add a implicit operand if it's not found.
   void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI,
                               bool AddIfNotFound = false) {
-    if (MI->addRegisterDead(IncomingReg, RegInfo, AddIfNotFound))
+    if (MI->addRegisterDead(IncomingReg, TRI, AddIfNotFound))
         getVarInfo(IncomingReg).Kills.push_back(MI);
   }
 
diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index 8dab6d527f..f212d67f07 100644
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -138,14 +138,65 @@ public:
   ///
   bool isDebugLabel() const;
 
+  /// readsRegister - Return true if the MachineInstr reads the specified
+  /// register. If TargetRegisterInfo is passed, then it also checks if there
+  /// is a read of a super-register.
+  bool readsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
+    return findRegisterUseOperandIdx(Reg, false, TRI) != -1;
+  }
+
+  /// killsRegister - Return true if the MachineInstr kills the specified
+  /// register. If TargetRegisterInfo is passed, then it also checks if there is
+  /// a kill of a super-register.
+  bool killsRegister(unsigned Reg, const TargetRegisterInfo *TRI = NULL) const {
+    return findRegisterUseOperandIdx(Reg, true, TRI) != -1;
+  }
+
+  /// modifiesRegister - Return true if the MachineInstr modifies the
+  /// specified register. If TargetRegisterInfo is passed, then it also checks
+  /// if there is a def of a super-register.
+  bool modifiesRegister(unsigned Reg,
+                        const TargetRegisterInfo *TRI = NULL) const {
+    return findRegisterDefOperandIdx(Reg, false, TRI) != -1;
+  }
+
+  /// registerDefIsDead - Returns true if the register is dead in this machine
+  /// instruction. If TargetRegisterInfo is passed, then it also checks
+  /// if there is a dead def of a super-register.
+  bool registerDefIsDead(unsigned Reg,
+                         const TargetRegisterInfo *TRI = NULL) const {
+    return findRegisterDefOperandIdx(Reg, true, TRI) != -1;
+  }
+
   /// findRegisterUseOperandIdx() - Returns the operand index that is a use of
   /// the specific register or -1 if it is not found. It further tightening
   /// the search criteria to a use that kills the register if isKill is true.
-  int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false) const;
+  int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false,
+                                const TargetRegisterInfo *TRI = NULL) const;
+
+  /// findRegisterUseOperand - Wrapper for findRegisterUseOperandIdx, it returns
+  /// a pointer to the MachineOperand rather than an index.
+  MachineOperand *findRegisterUseOperand(unsigned Reg,bool isKill = false,
+                                         const TargetRegisterInfo *TRI = NULL) {
+    int Idx = findRegisterUseOperandIdx(Reg, isKill, TRI);
+    return (Idx == -1) ? NULL : &getOperand(Idx);
+  }
   
-  /// findRegisterDefOperand() - Returns the MachineOperand that is a def of
-  /// the specific register or NULL if it is not found.
-  MachineOperand *findRegisterDefOperand(unsigned Reg);
+  /// findRegisterDefOperandIdx() - Returns the operand index that is a def of
+  /// the specific register or -1 if it is not found. It further tightening
+  /// the search criteria to a def that is dead the register if isDead is true.
+  /// If TargetRegisterInfo is passed, then it also checks if there is a def of
+  /// a super-register.
+  int findRegisterDefOperandIdx(unsigned Reg, bool isDead = false,
+                                const TargetRegisterInfo *TRI = NULL) const;
+
+  /// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns
+  /// a pointer to the MachineOperand rather than an index.
+  MachineOperand *findRegisterDefOperand(unsigned Reg,bool isDead = false,
+                                         const TargetRegisterInfo *TRI = NULL) {
+    int Idx = findRegisterDefOperandIdx(Reg, isDead, TRI);
+    return (Idx == -1) ? NULL : &getOperand(Idx);
+  }
 
   /// findFirstPredOperandIdx() - Find the index of the first operand in the
   /// operand list that is used to represent the predicate. It returns -1 if
diff --git a/include/llvm/CodeGen/RegisterScavenging.h b/include/llvm/CodeGen/RegisterScavenging.h
index 823ed130ba..63b3289c7f 100644
--- a/include/llvm/CodeGen/RegisterScavenging.h
+++ b/include/llvm/CodeGen/RegisterScavenging.h
@@ -127,7 +127,7 @@ public:
   }
 
 private:
-  const TargetRegisterInfo *RegInfo;
+  const TargetRegisterInfo *TRI;
   const TargetInstrInfo *TII;
 
   /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index 00ba2e770b..d710d48034 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -324,7 +324,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
 
       // If this redefinition is dead, we need to add a dummy unit live
       // range covering the def slot.
-      if (lv_->RegisterDefIsDead(mi, interval.reg))
+      if (mi->registerDefIsDead(interval.reg, tri_))
         interval.addRange(LiveRange(RedefIndex, RedefIndex+1, OldValNo));
 
       DOUT << " RESULT: ";
@@ -399,7 +399,7 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
   // If it is not used after definition, it is considered dead at
   // the instruction defining it. Hence its interval is:
   // [defSlot(def), defSlot(def)+1)
-  if (lv_->RegisterDefIsDead(mi, interval.reg)) {
+  if (mi->registerDefIsDead(interval.reg, tri_)) {
     DOUT << " dead";
     end = getDefIndex(start) + 1;
     goto exit;
@@ -410,11 +410,11 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
   // [defSlot(def), useSlot(kill)+1)
   while (++mi != MBB->end()) {
     baseIndex += InstrSlots::NUM;
-    if (lv_->KillsRegister(mi, interval.reg)) {
+    if (mi->killsRegister(interval.reg, tri_)) {
       DOUT << " killed";
       end = getUseIndex(baseIndex) + 1;
       goto exit;
-    } else if (lv_->ModifiesRegister(mi, interval.reg)) {
+    } else if (mi->modifiesRegister(interval.reg, tri_)) {
       // Another instruction redefines the register before it is ever read.
       // Then the register is essentially dead at the instruction that defines
       // it. Hence its interval is:
@@ -459,8 +459,9 @@ void LiveIntervals::handleRegisterDef(MachineBasicBlock *MBB,
     handlePhysicalRegisterDef(MBB, MI, MIIdx, getOrCreateInterval(reg), CopyMI);
     // Def of a register also defines its sub-registers.
     for (const unsigned* AS = tri_->getSubRegisters(reg); *AS; ++AS)
-      // Avoid processing some defs more than once.
-      if (!MI->findRegisterDefOperand(*AS))
+      // If MI also modifies the sub-register explicitly, avoid processing it
+      // more than once. Do not pass in TRI here so it checks for exact match.
+      if (!MI->modifiesRegister(*AS))
         handlePhysicalRegisterDef(MBB, MI, MIIdx, getOrCreateInterval(*AS), 0);
   }
 }
@@ -477,11 +478,11 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
   unsigned start = baseIndex;
   unsigned end = start;
   while (mi != MBB->end()) {
-    if (lv_->KillsRegister(mi, interval.reg)) {
+    if (mi->killsRegister(interval.reg, tri_)) {
       DOUT << " killed";
       end = getUseIndex(baseIndex) + 1;
       goto exit;
-    } else if (lv_->ModifiesRegister(mi, interval.reg)) {
+    } else if (mi->modifiesRegister(interval.reg, tri_)) {
       // Another instruction redefines the register before it is ever read.
       // Then the register is essentially dead at the instruction that defines
       // it. Hence its interval is:
@@ -842,9 +843,9 @@ void LiveIntervals::rewriteImplicitOps(const LiveInterval &li,
     if (!vrm.isReMaterialized(Reg))
       continue;
     MachineInstr *ReMatMI = vrm.getReMaterializedMI(Reg);
-    int OpIdx = ReMatMI->findRegisterUseOperandIdx(li.reg);
-    if (OpIdx != -1)
-      ReMatMI->getOperand(OpIdx).setReg(NewVReg);
+    MachineOperand *UseMO = ReMatMI->findRegisterUseOperand(li.reg);
+    if (UseMO)
+      UseMO->setReg(NewVReg);
   }
 }
 
@@ -1605,7 +1606,7 @@ addIntervalsForSpills(const LiveInterval &li,
         LiveRange *LR = &LI->ranges[LI->ranges.size()-1];
         unsigned LastUseIdx = getBaseIndex(LR->end);
         MachineInstr *LastUse = getInstructionFromIndex(LastUseIdx);
-        int UseIdx = LastUse->findRegisterUseOperandIdx(LI->reg);
+        int UseIdx = LastUse->findRegisterUseOperandIdx(LI->reg, false);
         assert(UseIdx != -1);
         if (LastUse->getOperand(UseIdx).isImplicit() ||
             LastUse->getDesc().getOperandConstraint(UseIdx,TOI::TIED_TO) == -1){
diff --git a/lib/CodeGen/LiveVariables.cpp b/lib/CodeGen/LiveVariables.cpp
index 48bf809e48..27f459d4f9 100644
--- a/lib/CodeGen/LiveVariables.cpp
+++ b/lib/CodeGen/LiveVariables.cpp
@@ -76,51 +76,6 @@ LiveVariables::VarInfo &LiveVariables::getVarInfo(unsigned RegIdx) {
   return VI;
 }
 
-/// KillsRegister - Returns true if the machine instruction kills the specified
-/// register.
-bool LiveVariables::KillsRegister(MachineInstr *MI, unsigned Reg) const {
-  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
-    const MachineOperand &MO = MI->getOperand(i);
-    if (MO.isRegister() && MO.isKill()) {
-      unsigned MOReg = MO.getReg();
-      if (MOReg == Reg ||
-          (TargetRegisterInfo::isPhysicalRegister(MOReg) &&
-           TargetRegisterInfo::isPhysicalRegister(Reg) &&
-           RegInfo->isSubRegister(MOReg, Reg)))
-        return true;
-    }
-  }
-  return false;
-}
-
-/// RegisterDefIsDead - Returns true if the register is dead in this machine
-/// instruction.
-bool LiveVariables::RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const {
-  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
-    const MachineOperand &MO = MI->getOperand(i);
-    if (MO.isRegister() && MO.isDead()) {
-      unsigned MOReg = MO.getReg();
-      if ((MOReg == Reg) ||
-          (TargetRegisterInfo::isPhysicalRegister(MOReg) &&
-           TargetRegisterInfo::isPhysicalRegister(Reg) &&
-           RegInfo->isSubRegister(MOReg, Reg)))
-        return true;
-    }
-  }
-  return false;
-}
-
-/// ModifiesRegister - Returns true if the machine instruction modifies the
-/// register.
-bool LiveVariables::ModifiesRegister(MachineInstr *MI, unsigned Reg) const {
-  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
-    const MachineOperand &MO = MI->getOperand(i);
-    if (MO.isRegister() && MO.isDef() && MO.getReg() == Reg)
-      return true;
-  }
-  return false;
-}
-
 void LiveVariables::MarkVirtRegAliveInBlock(VarInfo& VRInfo,
                                             MachineBasicBlock *DefBlock,
                                             MachineBasicBlock *MBB,
@@ -232,7 +187,7 @@ void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) {
       !PhysRegUsed[Reg]) {
     MachineInstr *Def = PhysRegInfo[Reg];
 
-    if (!Def->findRegisterDefOperand(Reg))
+    if (!Def->modifiesRegister(Reg))
       Def->addOperand(MachineOperand::CreateReg(Reg,
                                                 true  /*IsDef*/,
                                                 true  /*IsImp*/));
@@ -244,14 +199,14 @@ void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) {
   PhysRegUsed[Reg] = true;
 
   // Now reset the use information for the sub-registers.
-  for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
+  for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
        unsigned SubReg = *SubRegs; ++SubRegs) {
     PhysRegPartUse[SubReg] = NULL;
     PhysRegInfo[SubReg] = MI;
     PhysRegUsed[SubReg] = true;
   }
 
-  for (const unsigned *SuperRegs = RegInfo->getSuperRegisters(Reg);
+  for (const unsigned *SuperRegs = TRI->getSuperRegisters(Reg);
        unsigned SuperReg = *SuperRegs; ++SuperRegs) {
     // Remember the partial use of this super-register if it was previously
     // defined.
@@ -261,7 +216,7 @@ void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) {
       // No need to go up more levels. A def of a register also sets its sub-
       // registers. So if PhysRegInfo[SuperReg] is NULL, it means SuperReg's
       // super-registers are not previously defined.
-      for (const unsigned *SSRegs = RegInfo->getSuperRegisters(SuperReg);
+      for (const unsigned *SSRegs = TRI->getSuperRegisters(SuperReg);
            unsigned SSReg = *SSRegs; ++SSRegs)
         if (PhysRegInfo[SSReg] != NULL) {
           HasPrevDef = true;
@@ -281,11 +236,11 @@ void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) {
 void LiveVariables::addRegisterKills(unsigned Reg, MachineInstr *MI,
                                      SmallSet<unsigned, 4> &SubKills) {
   if (SubKills.count(Reg) == 0) {
-    MI->addRegisterKilled(Reg, RegInfo, true);
+    MI->addRegisterKilled(Reg, TRI, true);
     return;
   }
 
-  for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg);
+  for (const unsigned *SubRegs = TRI->getImmediateSubRegisters(Reg);
        unsigned SubReg = *SubRegs; ++SubRegs)
     addRegisterKills(SubReg, MI, SubKills);
 }
@@ -300,7 +255,7 @@ void LiveVariables::addRegisterKills(unsigned Reg, MachineInstr *MI,
 /// SubKills is filled with the set of sub-registers that are killed elsewhere.
 bool LiveVariables::HandlePhysRegKill(unsigned Reg, const MachineInstr *RefMI,
                                       SmallSet<unsigned, 4> &SubKills) {
-  const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg);
+  const unsigned *SubRegs = TRI->getImmediateSubRegisters(Reg);
 
   for (; unsigned SubReg = *SubRegs; ++SubRegs) {
     const MachineInstr *LastRef = PhysRegInfo[SubReg];
@@ -330,12 +285,12 @@ bool LiveVariables::HandlePhysRegKill(unsigned Reg, MachineInstr *RefMI) {
 
   if (HandlePhysRegKill(Reg, RefMI, SubKills)) {
     // This machine instruction kills this register.
-    RefMI->addRegisterKilled(Reg, RegInfo, true);
+    RefMI->addRegisterKilled(Reg, TRI, true);
     return true;
   }
 
   // Some sub-registers are killed by another machine instruction.
-  for (const unsigned *SubRegs = RegInfo->getImmediateSubRegisters(Reg);
+  for (const unsigned *SubRegs = TRI->getImmediateSubRegisters(Reg);
        unsigned SubReg = *SubRegs; ++SubRegs)
     addRegisterKills(SubReg, RefMI, SubKills);
 
@@ -348,38 +303,38 @@ void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) {
     if (PhysRegUsed[Reg]) {
       if (!HandlePhysRegKill(Reg, LastRef)) {
         if (PhysRegPartUse[Reg])
-          PhysRegPartUse[Reg]->addRegisterKilled(Reg, RegInfo, true);
+          PhysRegPartUse[Reg]->addRegisterKilled(Reg, TRI, true);
       }
     } else if (PhysRegPartUse[Reg]) {
       // Add implicit use / kill to last partial use.
-      PhysRegPartUse[Reg]->addRegisterKilled(Reg, RegInfo, true);
+      PhysRegPartUse[Reg]->addRegisterKilled(Reg, TRI, true);
     } else if (LastRef != MI) {
       // Defined, but not used. However, watch out for cases where a super-reg
       // is also defined on the same MI.
-      LastRef->addRegisterDead(Reg, RegInfo);
+      LastRef->addRegisterDead(Reg, TRI);
     }
   }
 
-  for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
+  for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
        unsigned SubReg = *SubRegs; ++SubRegs) {
     if (MachineInstr *LastRef = PhysRegInfo[SubReg]) {
       if (PhysRegUsed[SubReg]) {
         if (!HandlePhysRegKill(SubReg, LastRef)) {
           if (PhysRegPartUse[SubReg])
-            PhysRegPartUse[SubReg]->addRegisterKilled(SubReg, RegInfo, true);
+            PhysRegPartUse[SubReg]->addRegisterKilled(SubReg, TRI, true);
         }
       } else if (PhysRegPartUse[SubReg]) {
         // Add implicit use / kill to last use of a sub-register.
-        PhysRegPartUse[SubReg]->addRegisterKilled(SubReg, RegInfo, true);
+        PhysRegPartUse[SubReg]->addRegisterKilled(SubReg, TRI, true);
       } else if (LastRef != MI) {
         // This must be a def of the subreg on the same MI.
-        LastRef->addRegisterDead(SubReg, RegInfo);
+        LastRef->addRegisterDead(SubReg, TRI);
       }
     }
   }
 
   if (MI) {
-    for (const unsigned *SuperRegs = RegInfo->getSuperRegisters(Reg);
+    for (const unsigned *SuperRegs = TRI->getSuperRegisters(Reg);
          unsigned SuperReg = *SuperRegs; ++SuperRegs) {
       if (PhysRegInfo[SuperReg] && PhysRegInfo[SuperReg] != MI) {
         // The larger register is previously defined. Now a smaller part is
@@ -404,7 +359,7 @@ void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) {
     PhysRegPartDef[Reg].clear();
     PhysRegPartUse[Reg] = NULL;
 
-    for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
+    for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
          unsigned SubReg = *SubRegs; ++SubRegs) {
       PhysRegInfo[SubReg] = MI;
       PhysRegUsed[SubReg] = false;
@@ -416,13 +371,12 @@ void LiveVariables::HandlePhysRegDef(unsigned Reg, MachineInstr *MI) {
 
 bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
   MF = &mf;
-  RegInfo = MF->getTarget().getRegisterInfo();
+  TRI = MF->getTarget().getRegisterInfo();
   MachineRegisterInfo& MRI = mf.getRegInfo();
-  assert(RegInfo && "Target doesn't have register information?");
 
-  ReservedRegisters = RegInfo->getReservedRegs(mf);
+  ReservedRegisters = TRI->getReservedRegs(mf);
 
-  unsigned NumRegs = RegInfo->getNumRegs();
+  unsigned NumRegs = TRI->getNumRegs();
   PhysRegInfo = new MachineInstr*[NumRegs];
   PhysRegUsed = new bool[NumRegs];
   PhysRegPartUse = new MachineInstr*[NumRegs];
@@ -533,7 +487,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
         HandlePhysRegUse(*I, Ret);
 
         // Add live-out registers as implicit uses.
-        if (Ret->findRegisterUseOperandIdx(*I) == -1)
+        if (!Ret->readsRegister(*I))
           Ret->addOperand(MachineOperand::CreateReg(*I, false, true));
       }
     }
@@ -562,12 +516,12 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &mf) {
         VirtRegInfo[i]
           .Kills[j]->addRegisterDead(i +
                                      TargetRegisterInfo::FirstVirtualRegister,
-                                     RegInfo);
+                                     TRI);
       else
         VirtRegInfo[i]
           .Kills[j]->addRegisterKilled(i +
                                        TargetRegisterInfo::FirstVirtualRegister,
-                                       RegInfo);
+                                       TRI);
 
   // Check to make sure there are no unreachable blocks in the MC CFG for the
   // function.  If so, it is due to a bug in the instruction selector or some
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 3134cfb335..b396382cf6 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -532,25 +532,45 @@ bool MachineInstr::isDebugLabel() const {
 /// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
 /// the specific register or -1 if it is not found. It further tightening
 /// the search criteria to a use that kills the register if isKill is true.
-int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill) const {
+int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill,
+                                          const TargetRegisterInfo *TRI) const {
   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = getOperand(i);
-    if (MO.isRegister() && MO.isUse() && MO.getReg() == Reg)
+    if (!MO.isRegister() || !MO.isUse())
+      continue;
+    unsigned MOReg = MO.getReg();
+    if (!MOReg)
+      continue;
+    if (MOReg == Reg ||
+        (TRI &&
+         TargetRegisterInfo::isPhysicalRegister(MOReg) &&
+         TargetRegisterInfo::isPhysicalRegister(Reg) &&
+         TRI->isSubRegister(MOReg, Reg)))
       if (!isKill || MO.isKill())
         return i;
   }
   return -1;
 }
   
-/// findRegisterDefOperand() - Returns the MachineOperand that is a def of
-/// the specific register or NULL if it is not found.
-MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
+/// findRegisterDefOperandIdx() - Returns the operand index that is a def of
+/// the specific register or -1 if it is not found. It further tightening
+  /// the search criteria to a def that is dead the register if isDead is true.
+int MachineInstr::findRegisterDefOperandIdx(unsigned Reg, bool isDead,
+                                          const TargetRegisterInfo *TRI) const {
   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
-    MachineOperand &MO = getOperand(i);
-    if (MO.isRegister() && MO.isDef() && MO.getReg() == Reg)
-      return &MO;
+    const MachineOperand &MO = getOperand(i);
+    if (!MO.isRegister() || !MO.isDef())
+      continue;
+    unsigned MOReg = MO.getReg();
+    if (MOReg == Reg ||
+        (TRI &&
+         TargetRegisterInfo::isPhysicalRegister(MOReg) &&
+         TargetRegisterInfo::isPhysicalRegister(Reg) &&
+         TRI->isSubRegister(MOReg, Reg)))
+      if (!isDead || MO.isDead())
+        return i;
   }
-  return NULL;
+  return -1;
 }
 
 /// findFirstPredOperandIdx() - Find the index of the first operand in the
diff --git a/lib/CodeGen/PHIElimination.cpp b/lib/CodeGen/PHIElimination.cpp
index 845b1c11d6..fd997bfecf 100644
--- a/lib/CodeGen/PHIElimination.cpp
+++ b/lib/CodeGen/PHIElimination.cpp
@@ -161,7 +161,7 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
     LV->removeVirtualRegistersKilled(MPhi);
 
     // If the result is dead, update LV.
-    if (LV->RegisterDefIsDead(MPhi, DestReg)) {
+    if (MPhi->registerDefIsDead(DestReg)) {
       LV->addVirtualRegisterDead(DestReg, PHICopy);
       LV->removeVirtualRegistersDead(MPhi);
     }
diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index 9e274543cf..5eceae4ec6 100644
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -306,8 +306,7 @@ void RALocal::spillVirtReg(MachineBasicBlock &MBB,
     // If the instruction reads the register that's spilled, (e.g. this can
     // happen if it is a move to a physical register), then the spill
     // instruction is not a kill.
-    bool isKill = !(I != MBB.end() &&
-                    I->findRegisterUseOperandIdx(PhysReg) != -1);
+    bool isKill = !(I != MBB.end() && I->readsRegister(PhysReg));
     TII->storeRegToStackSlot(MBB, I, PhysReg, isKill, FrameIndex, RC);
     ++NumStores;   // Update statistics
   }
diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp
index 253bc23d45..c074706249 100644
--- a/lib/CodeGen/RegisterScavenging.cpp
+++ b/lib/CodeGen/RegisterScavenging.cpp
@@ -29,7 +29,7 @@ using namespace llvm;
 void RegScavenger::setUsed(unsigned Reg) {
   RegsAvailable.reset(Reg);
 
-  for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
+  for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
        unsigned SubReg = *SubRegs; ++SubRegs)
     RegsAvailable.reset(SubReg);
 }
@@ -38,7 +38,7 @@ void RegScavenger::setUsed(unsigned Reg) {
 void RegScavenger::setUnused(unsigned Reg) {
   RegsAvailable.set(Reg);
 
-  for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
+  for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
        unsigned SubReg = *SubRegs; ++SubRegs)
     RegsAvailable.set(SubReg);
 }
@@ -47,21 +47,21 @@ void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
   const MachineFunction &MF = *mbb->getParent();
   const TargetMachine &TM = MF.getTarget();
   TII = TM.getInstrInfo();
-  RegInfo = TM.getRegisterInfo();
+  TRI = TM.getRegisterInfo();
 
-  assert((NumPhysRegs == 0 || NumPhysRegs == RegInfo->getNumRegs()) &&
+  assert((NumPhysRegs == 0 || NumPhysRegs == TRI->getNumRegs()) &&
          "Target changed?");
 
   if (!MBB) {
-    NumPhysRegs = RegInfo->getNumRegs();
+    NumPhysRegs = TRI->getNumRegs();
     RegsAvailable.resize(NumPhysRegs);
 
     // Create reserved registers bitvector.
-    ReservedRegs = RegInfo->getReservedRegs(MF);
+    ReservedRegs = TRI->getReservedRegs(MF);
 
     // Create callee-saved registers bitvector.
     CalleeSavedRegs.resize(NumPhysRegs);
-    const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
+    const unsigned *CSRegs = TRI->getCalleeSavedRegs();
     if (CSRegs != NULL)
       for (unsigned i = 0; CSRegs[i]; ++i)
         CalleeSavedRegs.set(CSRegs[i]);
@@ -93,7 +93,7 @@ void RegScavenger::restoreScavengedReg() {
   TII->loadRegFromStackSlot(*MBB, MBBI, ScavengedReg,
                                 ScavengingFrameIndex, ScavengedRC);
   MachineBasicBlock::iterator II = prior(MBBI);
-  RegInfo->eliminateFrameIndex(II, 0, this);
+  TRI->eliminateFrameIndex(II, 0, this);
   setUsed(ScavengedReg);
   ScavengedReg = 0;
   ScavengedRC = NULL;
@@ -138,7 +138,7 @@ void RegScavenger::forward() {
     if (MO.isKill() && !isReserved(Reg)) {
       ChangedRegs.set(Reg);
 
-      for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
+      for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
            unsigned SubReg = *SubRegs; ++SubRegs)
         ChangedRegs.set(SubReg);
     }
@@ -210,7 +210,7 @@ void RegScavenger::backward() {
     ChangedRegs.set(Reg);
 
     // Set the sub-registers as "used".
-    for (const unsigned *SubRegs = RegInfo->getSubRegisters(Reg);
+    for (const unsigned *SubRegs = TRI->getSubRegisters(Reg);
          unsigned SubReg = *SubRegs; ++SubRegs)
       ChangedRegs.set(SubReg);
   }
@@ -267,12 +267,13 @@ unsigned RegScavenger::FindUnusedReg(const TargetRegisterClass *RegClass,
 /// calcDistanceToUse - Calculate the distance to the first use of the
 /// specified register.
 static unsigned calcDistanceToUse(MachineBasicBlock *MBB,
-                                  MachineBasicBlock::iterator I, unsigned Reg) {
+                                  MachineBasicBlock::iterator I, unsigned Reg,
+                                  const TargetRegisterInfo *TRI) {
   unsigned Dist = 0;
   I = next(I);
   while (I != MBB->end()) {
     Dist++;
-    if (I->findRegisterUseOperandIdx(Reg) != -1)
+    if (I->readsRegister(Reg, TRI))
         return Dist;
     I = next(I);    
   }
@@ -302,7 +303,7 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
   unsigned MaxDist = 0;
   int Reg = Candidates.find_first();
   while (Reg != -1) {
-    unsigned Dist = calcDistanceToUse(MBB, I, Reg);
+    unsigned Dist = calcDistanceToUse(MBB, I, Reg, TRI);
     if (Dist >= MaxDist) {
       MaxDist = Dist;
       SReg = Reg;
@@ -315,12 +316,12 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
     TII->loadRegFromStackSlot(*MBB, I, ScavengedReg,
                               ScavengingFrameIndex, ScavengedRC);
     MachineBasicBlock::iterator II = prior(I);
-    RegInfo->eliminateFrameIndex(II, SPAdj, this);
+    TRI->eliminateFrameIndex(II, SPAdj, this);
   }
 
   TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC);
   MachineBasicBlock::iterator II = prior(I);
-  RegInfo->eliminateFrameIndex(II, SPAdj, this);
+  TRI->eliminateFrameIndex(II, SPAdj, this);
   ScavengedReg = SReg;
   ScavengedRC = RC;
 
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp
index 8bab647296..03b27aca18 100644
--- a/lib/CodeGen/SimpleRegisterCoalescing.cpp
+++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp
@@ -307,7 +307,7 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA,
     MBB->insert(DefMI, NewMI);
     MBB->erase(DefMI);
   }
-  unsigned OpIdx = NewMI->findRegisterUseOperandIdx(IntA.reg);
+  unsigned OpIdx = NewMI->findRegisterUseOperandIdx(IntA.reg, false);
   NewMI->getOperand(OpIdx).setIsKill();
 
   // Update uses of IntA of the specific Val# with IntB.
@@ -588,7 +588,7 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
 
   // Check if it is necessary to propagate "isDead" property before intervals
   // are joined.
-  MachineOperand *mopd = CopyMI->findRegisterDefOperand(DstReg);
+  MachineOperand *mopd = CopyMI->findRegisterDefOperand(DstReg, false);
   bool isDead = mopd->isDead();
   bool isShorten = false;
   unsigned SrcStart = 0, RemoveStart = 0;
@@ -617,12 +617,9 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
         RemoveEnd = SrcEnd;
       } else {
         MachineInstr *SrcMI = li_->getInstructionFromIndex(SrcStart);
-        if (SrcMI) {
-          MachineOperand *mops = findDefOperand(SrcMI, SrcReg);
-          if (mops)
-            // A dead def should have a single cycle interval.
-            ++RemoveStart;
-        }
+        if (SrcMI && SrcMI->modifiesRegister(SrcReg, tri_))
+          // A dead def should have a single cycle interval.
+          ++RemoveStart;
       }
     }
   }
@@ -672,9 +669,9 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
       } else {
         MachineInstr *SrcMI = li_->getInstructionFromIndex(SrcStart);
         if (SrcMI) {
-          MachineOperand *mops = findDefOperand(SrcMI, SrcReg);
-          if (mops)
-            mops->setIsDead();
+          int DeadIdx = SrcMI->findRegisterDefOperandIdx(SrcReg, false, tri_);
+          if (DeadIdx != -1)
+            SrcMI->getOperand(DeadIdx).setIsDead();
         }
       }
     }
@@ -1461,20 +1458,6 @@ SimpleRegisterCoalescing::lastRegisterUse(unsigned Start, unsigned End,
 }
 
 
-/// findDefOperand - Returns the MachineOperand that is a def of the specific
-/// register. It returns NULL if the def is not found.
-/// FIXME: Move to MachineInstr.
-MachineOperand *SimpleRegisterCoalescing::findDefOperand(MachineInstr *MI,
-                                                         unsigned Reg) const {
-  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
-    MachineOperand &MO = MI->getOperand(i);
-    if (MO.isRegister() && MO.isDef() &&
-        tri_->regsOverlap(MO.getReg(), Reg))
-      return &MO;
-  }
-  return NULL;
-}
-
 /// RemoveUnnecessaryKills - Remove kill markers that are no longer accurate
 /// due to live range lengthening as the result of coalescing.
 void SimpleRegisterCoalescing::printRegName(unsigned reg) const {
@@ -1548,7 +1531,7 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
       if (tii_->isMoveInstr(*mii, srcReg, dstReg) && srcReg == dstReg) {
         // remove from def list
         LiveInterval &RegInt = li_->getOrCreateInterval(srcReg);
-        MachineOperand *MO = mii->findRegisterDefOperand(dstReg);
+        MachineOperand *MO = mii->findRegisterDefOperand(dstReg, false);
         // If def of this move instruction is dead, remove its live range from
         // the dstination register's live interval.
         if (MO->isDead()) {
diff --git a/lib/CodeGen/SimpleRegisterCoalescing.h b/lib/CodeGen/SimpleRegisterCoalescing.h
index 74c3978742..1c21620302 100644
--- a/lib/CodeGen/SimpleRegisterCoalescing.h
+++ b/lib/CodeGen/SimpleRegisterCoalescing.h
@@ -206,10 +206,6 @@ namespace llvm {
     MachineOperand *lastRegisterUse(unsigned Start, unsigned End, unsigned Reg,
                                     unsigned &LastUseIdx) const;
 
-    /// findDefOperand - Returns the MachineOperand that is a def of the specific
-    /// register. It returns NULL if the def is not found.
-    MachineOperand *findDefOperand(MachineInstr *MI, unsigned Reg) const;
-
     void printRegName(unsigned reg) const;
   };
 
diff --git a/lib/CodeGen/StrongPHIElimination.cpp b/lib/CodeGen/StrongPHIElimination.cpp
index cdf827d50e..4611daec46 100644
--- a/lib/CodeGen/StrongPHIElimination.cpp
+++ b/lib/CodeGen/StrongPHIElimination.cpp
@@ -351,10 +351,10 @@ static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan,
           break;
         }
       // Store KillInsts if they match up with the definition
-      } else if (LV.KillsRegister(curr, a)) {
+      } else if (curr->killsRegister(a)) {
         if (def == MRI->getVRegDef(a)) {
           kill = curr;
-        } else if (LV.KillsRegister(curr, b)) {
+        } else if (curr->killsRegister(b)) {
           if (def == MRI->getVRegDef(b)) {
             kill = curr;
           }
@@ -373,7 +373,7 @@ static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan,
           break;
         }
       // Save KillInsts of First
-      } else if (LV.KillsRegister(curr, a)) {
+      } else if (curr->killsRegister(a)) {
         kill = curr;
       }
     // Symmetric with the above
@@ -386,7 +386,7 @@ static bool interferes(unsigned a, unsigned b, MachineBasicBlock* scan,
           interference = false;
           break;
         }
-      } else if (LV.KillsRegister(curr, b)) {
+      } else if (curr->killsRegister(b)) {
         kill = curr;
       }
     }
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index ce1f6c84c5..5d8781b871 100644
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -139,7 +139,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
           // rearrange the code to make it so.  Making it the killing user will
           // allow us to coalesce A and B together, eliminating the copy we are
           // about to insert.
-          if (!LV.KillsRegister(mi, regB)) {
+          if (!mi->killsRegister(regB)) {
             // If this instruction is commutative, check to see if C dies.  If
             // so, swap the B and C operands.  This makes the live ranges of A
             // and C joinable.
@@ -148,7 +148,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
               assert(mi->getOperand(3-si).isRegister() &&
                      "Not a proper commutative instruction!");
               unsigned regC = mi->getOperand(3-si).getReg();
-              if (LV.KillsRegister(mi, regC)) {
+              if (mi->killsRegister(regC)) {
                 DOUT << "2addr: COMMUTING  : " << *mi;
                 MachineInstr *NewMI = TII.commuteInstruction(mi);
                 if (NewMI == 0) {
diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index 6cfbee9b7b..c39ac610e9 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -862,8 +862,7 @@ bool LocalSpiller::PrepForUnfoldOpti(MachineBasicBlock &MBB,
     MachineInstr* DeadStore = MaybeDeadStores[FoldedSS];
     if (DeadStore && (MR & VirtRegMap::isModRef)) {
       unsigned PhysReg = Spills.getSpillSlotOrReMatPhysReg(FoldedSS);
-      if (!PhysReg ||
-          DeadStore->findRegisterUseOperandIdx(PhysReg, true) == -1)
+      if (!PhysReg || !DeadStore->readsRegister(PhysReg))
         continue;
       UnfoldPR = PhysReg;
       UnfoldedOpc = TII->getOpcodeAfterMemoryUnfold(MI.getOpcode(),
@@ -908,7 +907,7 @@ bool LocalSpiller::PrepForUnfoldOpti(MachineBasicBlock &MBB,
       assert(NewMIs.size() == 1);
       MachineInstr *NewMI = NewMIs.back();
       NewMIs.clear();
-      int Idx = NewMI->findRegisterUseOperandIdx(VirtReg);
+      int Idx = NewMI->findRegisterUseOperandIdx(VirtReg, false);
       assert(Idx != -1);
       SmallVector<unsigned, 2> Ops;
       Ops.push_back(Idx);
@@ -1410,7 +1409,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
           // the physreg.
           if (PhysReg &&
               !TII->isStoreToStackSlot(&MI, SS) && // Not profitable!
-              DeadStore->findRegisterUseOperandIdx(PhysReg, true) != -1 &&
+              DeadStore->killsRegister(PhysReg) &&
               TII->unfoldMemoryOperand(MF, &MI, PhysReg, false, true, NewMIs)) {
             MBB.insert(MII, NewMIs[0]);
             NewStore = NewMIs[1];
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp
index 30c1742ff7..babee6a43e 100644
--- a/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/lib/Target/ARM/ARMInstrInfo.cpp
@@ -294,8 +294,7 @@ ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
         for (unsigned j = 0; j < 2; ++j) {
           // Look at the two new MI's in reverse order.
           MachineInstr *NewMI = NewMIs[j];
-          int NIdx = NewMI->findRegisterUseOperandIdx(Reg);
-          if (NIdx == -1)
+          if (!NewMI->readsRegister(Reg))
             continue;
           LV.addVirtualRegisterKilled(Reg, NewMI);
           if (VI.removeKill(MI))
diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp
index cf7fc1faa3..3650825e2b 100644
--- a/lib/Target/X86/X86FloatingPoint.cpp
+++ b/lib/Target/X86/X86FloatingPoint.cpp
@@ -154,18 +154,6 @@ namespace {
 
 FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS(); }
 
-/// KillsRegister - Return true if the specified instruction kills (is the last
-/// use of) the specified register.  Note that this routine does not check for
-/// kills of subregisters.
-static bool KillsRegister(MachineInstr *MI, unsigned Reg) {
-  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
-    MachineOperand &MO = MI->getOperand(i);
-    if (MO.isRegister() && MO.isKill() && MO.getReg() == Reg)
-      return true;
-  }
-  return false;
-}
-
 /// getFPReg - Return the X86::FPx register number for the specified operand.
 /// For example, this returns 3 for X86::FP3.
 static unsigned getFPReg(const MachineOperand &MO) {
@@ -610,7 +598,7 @@ void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) {
 
   // Is this the last use of the source register?
   unsigned Reg = getFPReg(MI->getOperand(NumOps-1));
-  bool KillsSrc = KillsRegister(MI, X86::FP0+Reg);
+  bool KillsSrc = MI->killsRegister(X86::FP0+Reg);
 
   // FISTP64m is strange because there isn't a non-popping versions.
   // If we have one _and_ we don't want to pop the operand, duplicate the value
@@ -669,7 +657,7 @@ void FPS::handleOneArgFPRW(MachineBasicBlock::iterator &I) {
 
   // Is this the last use of the source register?
   unsigned Reg = getFPReg(MI->getOperand(1));
-  bool KillsSrc = KillsRegister(MI, X86::FP0+Reg);
+  bool KillsSrc = MI->killsRegister(X86::FP0+Reg);
 
   if (KillsSrc) {
     // If this is the last use of the source register, just make sure it's on
@@ -778,8 +766,8 @@ void FPS::handleTwoArgFP(MachineBasicBlock::iterator &I) {
   unsigned Dest = getFPReg(MI->getOperand(0));
   unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2));
   unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1));
-  bool KillsOp0 = KillsRegister(MI, X86::FP0+Op0);
-  bool KillsOp1 = KillsRegister(MI, X86::FP0+Op1);
+  bool KillsOp0 = MI->killsRegister(X86::FP0+Op0);
+  bool KillsOp1 = MI->killsRegister(X86::FP0+Op1);
 
   unsigned TOS = getStackEntry(0);
 
@@ -875,8 +863,8 @@ void FPS::handleCompareFP(MachineBasicBlock::iterator &I) {
   assert(NumOperands == 2 && "Illegal FUCOM* instruction!");
   unsigned Op0 = getFPReg(MI->getOperand(NumOperands-2));
   unsigned Op1 = getFPReg(MI->getOperand(NumOperands-1));
-  bool KillsOp0 = KillsRegister(MI, X86::FP0+Op0);
-  bool KillsOp1 = KillsRegister(MI, X86::FP0+Op1);
+  bool KillsOp0 = MI->killsRegister(X86::FP0+Op0);
+  bool KillsOp1 = MI->killsRegister(X86::FP0+Op1);
 
   // Make sure the first operand is on the top of stack, the other one can be
   // anywhere.
@@ -901,7 +889,7 @@ void FPS::handleCondMovFP(MachineBasicBlock::iterator &I) {
 
   unsigned Op0 = getFPReg(MI->getOperand(0));
   unsigned Op1 = getFPReg(MI->getOperand(2));
-  bool KillsOp1 = KillsRegister(MI, X86::FP0+Op1);
+  bool KillsOp1 = MI->killsRegister(X86::FP0+Op1);
 
   // The first operand *must* be on the top of the stack.
   moveToTop(Op0, I);
@@ -958,7 +946,7 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) {
     unsigned SrcReg = getFPReg(MI->getOperand(1));
     unsigned DestReg = getFPReg(MI->getOperand(0));
 
-    if (KillsRegister(MI, X86::FP0+SrcReg)) {
+    if (MI->killsRegister(X86::FP0+SrcReg)) {
       // If the input operand is killed, we can just change the owner of the
       // incoming stack slot into the result.
       unsigned Slot = getSlot(SrcReg);