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authorPreston Gurd <preston.gurd@intel.com>2013-09-18 21:08:09 +0000
committerPreston Gurd <preston.gurd@intel.com>2013-09-18 21:08:09 +0000
commit7d03cc871546dd7f3edd36b334e83a34d04bee03 (patch)
treee2a2738c304c7933421d2b1fc85fb8d33569853d
parentd139e02e9b79e0cd95073a10d55e6190e6c6051d (diff)
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Verify that llvm can generate the prefetchw instruction when the CPU is
Atom Silvermont. Patch by Sriram Murali. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190957 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--test/CodeGen/X86/prefetch.ll2
1 files changed, 2 insertions, 0 deletions
diff --git a/test/CodeGen/X86/prefetch.ll b/test/CodeGen/X86/prefetch.ll
index efb51913c5..08a913638b 100644
--- a/test/CodeGen/X86/prefetch.ll
+++ b/test/CodeGen/X86/prefetch.ll
@@ -1,6 +1,7 @@
; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s
; RUN: llc < %s -march=x86 -mattr=+sse -mattr=+prfchw | FileCheck %s -check-prefix=PRFCHW
+; RUN: llc < %s -mcpu=slm | FileCheck %s -check-prefix=SLM
; rdar://10538297
@@ -11,6 +12,7 @@ entry:
; CHECK: prefetcht0
; CHECK: prefetchnta
; PRFCHW: prefetchw
+; SLM: prefetchw
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1, i32 1 )
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2, i32 1 )
tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 1 )