summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJim Grosbach <grosbach@apple.com>2011-03-12 01:05:29 +0000
committerJim Grosbach <grosbach@apple.com>2011-03-12 01:05:29 +0000
commit7d3a16a6f8a696a8d73fe369f5a0f57c9f3f9597 (patch)
tree9f0390566d778e4946d19b8ac730e0e4d5e578ed
parent34e98e968f29852d89460ec68fdd4783c5c8dceb (diff)
downloadllvm-7d3a16a6f8a696a8d73fe369f5a0f57c9f3f9597.tar.gz
llvm-7d3a16a6f8a696a8d73fe369f5a0f57c9f3f9597.tar.bz2
llvm-7d3a16a6f8a696a8d73fe369f5a0f57c9f3f9597.tar.xz
Remove no-longer-correct special case for disasm of ARM BL instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127517 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--utils/TableGen/ARMDecoderEmitter.cpp5
1 files changed, 0 insertions, 5 deletions
diff --git a/utils/TableGen/ARMDecoderEmitter.cpp b/utils/TableGen/ARMDecoderEmitter.cpp
index 2ebfb2e477..09243e116b 100644
--- a/utils/TableGen/ARMDecoderEmitter.cpp
+++ b/utils/TableGen/ARMDecoderEmitter.cpp
@@ -1592,11 +1592,6 @@ ARMDEBackend::populateInstruction(const CodeGenInstruction &CGI,
// better off using the generic RSCri and RSCrs instructions.
if (Name == "RSCSri" || Name == "RSCSrs") return false;
- // Ignore the non-Darwin BL instructions and the TPsoft (TLS) instruction.
- if (Name == "BL" || Name == "BL_pred" || Name == "BLX" ||
- Name == "BLX_pred" || Name == "TPsoft")
- return false;
-
// A8-598: VEXT
// Vector Extract extracts elements from the bottom end of the second
// operand vector and the top end of the first, concatenates them and