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author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2008-08-07 19:08:11 +0000 |
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committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2008-08-07 19:08:11 +0000 |
commit | 7da151cd5deb9f77ea68806633f3a1ccc3e7c903 (patch) | |
tree | 3f11d871a8bdf50b588fc1018e957136c367c5e5 | |
parent | e36bfe678df09f46e1eac60b15105c1ccd2c5382 (diff) | |
download | llvm-7da151cd5deb9f77ea68806633f3a1ccc3e7c903.tar.gz llvm-7da151cd5deb9f77ea68806633f3a1ccc3e7c903.tar.bz2 llvm-7da151cd5deb9f77ea68806633f3a1ccc3e7c903.tar.xz |
Added Mips support for DYNAMIC_STACKALLOC
Fixed bug in adjustMipsStackFrame, which was breaking
while trying to access a dead stack object index. Also added
one more alignment before fixing the callee saved registers
stack offset adjustment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54485 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 71 | ||||
-rw-r--r-- | lib/Target/Mips/MipsISelLowering.h | 1 | ||||
-rw-r--r-- | lib/Target/Mips/MipsRegisterInfo.cpp | 3 |
3 files changed, 52 insertions, 23 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index e286df197c..fb0cb63aa9 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -92,16 +92,17 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM) AddPromotedToType(ISD::SETCC, MVT::i1, MVT::i32); // Mips Custom Operations - setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); - setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom); - setOperationAction(ISD::RET, MVT::Other, Custom); - setOperationAction(ISD::JumpTable, MVT::i32, Custom); - setOperationAction(ISD::ConstantPool, MVT::i32, Custom); - setOperationAction(ISD::SELECT, MVT::f32, Custom); - setOperationAction(ISD::SELECT, MVT::i32, Custom); - setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); - setOperationAction(ISD::SETCC, MVT::f32, Custom); - setOperationAction(ISD::BRCOND, MVT::Other, Custom); + setOperationAction(ISD::GlobalAddress, MVT::i32, Custom); + setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom); + setOperationAction(ISD::RET, MVT::Other, Custom); + setOperationAction(ISD::JumpTable, MVT::i32, Custom); + setOperationAction(ISD::ConstantPool, MVT::i32, Custom); + setOperationAction(ISD::SELECT, MVT::f32, Custom); + setOperationAction(ISD::SELECT, MVT::i32, Custom); + setOperationAction(ISD::SELECT_CC, MVT::i32, Custom); + setOperationAction(ISD::SETCC, MVT::f32, Custom); + setOperationAction(ISD::BRCOND, MVT::Other, Custom); + setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom); // We custom lower AND/OR to handle the case where the DAG contain 'ands/ors' // with operands comming from setcc fp comparions. This is necessary since @@ -161,19 +162,20 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) { switch (Op.getOpcode()) { - case ISD::AND: return LowerANDOR(Op, DAG); - case ISD::BRCOND: return LowerBRCOND(Op, DAG); - case ISD::CALL: return LowerCALL(Op, DAG); - case ISD::ConstantPool: return LowerConstantPool(Op, DAG); - case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG); - case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); - case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG); - case ISD::JumpTable: return LowerJumpTable(Op, DAG); - case ISD::OR: return LowerANDOR(Op, DAG); - case ISD::RET: return LowerRET(Op, DAG); - case ISD::SELECT: return LowerSELECT(Op, DAG); - case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); - case ISD::SETCC: return LowerSETCC(Op, DAG); + case ISD::AND: return LowerANDOR(Op, DAG); + case ISD::BRCOND: return LowerBRCOND(Op, DAG); + case ISD::CALL: return LowerCALL(Op, DAG); + case ISD::ConstantPool: return LowerConstantPool(Op, DAG); + case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG); + case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG); + case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); + case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG); + case ISD::JumpTable: return LowerJumpTable(Op, DAG); + case ISD::OR: return LowerANDOR(Op, DAG); + case ISD::RET: return LowerRET(Op, DAG); + case ISD::SELECT: return LowerSELECT(Op, DAG); + case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); + case ISD::SETCC: return LowerSETCC(Op, DAG); } return SDValue(); } @@ -362,6 +364,29 @@ MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, //===----------------------------------------------------------------------===// SDValue MipsTargetLowering:: +LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) +{ + SDValue Chain = Op.getOperand(0); + SDValue Size = Op.getOperand(1); + + // Get a reference from Mips stack pointer + SDValue StackPointer = DAG.getCopyFromReg(Chain, Mips::SP, MVT::i32); + + // Subtract the dynamic size from the actual stack size to + // obtain the new stack size. + SDValue Sub = DAG.getNode(ISD::SUB, MVT::i32, StackPointer, Size); + + // The Sub result contains the new stack start address, so it + // must be placed in the stack pointer register. + Chain = DAG.getCopyToReg(StackPointer.getValue(1), Mips::SP, Sub); + + // This node always has two return values: a new stack pointer + // value and a chain + SDValue Ops[2] = { Sub, Chain }; + return DAG.getMergeValues(Ops, 2); +} + +SDValue MipsTargetLowering:: LowerANDOR(SDValue Op, SelectionDAG &DAG) { SDValue LHS = Op.getOperand(0); diff --git a/lib/Target/Mips/MipsISelLowering.h b/lib/Target/Mips/MipsISelLowering.h index 25b11619fd..3c8afb81a8 100644 --- a/lib/Target/Mips/MipsISelLowering.h +++ b/lib/Target/Mips/MipsISelLowering.h @@ -93,6 +93,7 @@ namespace llvm { SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG); SDValue LowerCALL(SDValue Op, SelectionDAG &DAG); SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG); + SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG); SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG); SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG); SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG); diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp index 424cf03f6b..6d75f460d3 100644 --- a/lib/Target/Mips/MipsRegisterInfo.cpp +++ b/lib/Target/Mips/MipsRegisterInfo.cpp @@ -249,6 +249,8 @@ void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const for (int i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) { if (i >= MinCSFI && i <= MaxCSFI) continue; + if (MFI->isDeadObjectIndex(i)) + continue; unsigned Offset = MFI->getObjectOffset(i) - CalleeSavedAreaSize; if (LastOffsetFI == -1) LastOffsetFI = i; @@ -266,6 +268,7 @@ void MipsRegisterInfo::adjustMipsStackFrame(MachineFunction &MF) const if (LastOffsetFI >= 0) StackOffset = MFI->getObjectOffset(LastOffsetFI)+ MFI->getObjectAlignment(LastOffsetFI); + StackOffset = ((StackOffset+StackAlign-1)/StackAlign*StackAlign); for (unsigned i = 0, e = CSI.size(); i != e ; ++i) { if (CSI[i].getRegClass() != Mips::CPURegsRegisterClass) |