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| author | Nadav Rotem <nadav.rotem@intel.com> | 2012-04-24 20:18:49 +0000 |
|---|---|---|
| committer | Nadav Rotem <nadav.rotem@intel.com> | 2012-04-24 20:18:49 +0000 |
| commit | 80c1ea6f9baedf7e957e1c26f960792f016b5329 (patch) | |
| tree | 99dbe84c696770f3ea0b813e4b3a23deb8517e07 | |
| parent | 2003e03045b6b89de455afda677198bb8b8b36b7 (diff) | |
| download | llvm-80c1ea6f9baedf7e957e1c26f960792f016b5329.tar.gz llvm-80c1ea6f9baedf7e957e1c26f960792f016b5329.tar.bz2 llvm-80c1ea6f9baedf7e957e1c26f960792f016b5329.tar.xz | |
ConstantFoldSelectInstruction swapped the operands of the select.
Fix 12592. Patch by Matt Pharr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155480 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/VMCore/ConstantFold.cpp | 2 | ||||
| -rw-r--r-- | test/Transforms/InstCombine/2012-04-24-vselect.ll | 13 |
2 files changed, 14 insertions, 1 deletions
diff --git a/lib/VMCore/ConstantFold.cpp b/lib/VMCore/ConstantFold.cpp index b743287adf..9b1c756b7d 100644 --- a/lib/VMCore/ConstantFold.cpp +++ b/lib/VMCore/ConstantFold.cpp @@ -700,7 +700,7 @@ Constant *llvm::ConstantFoldSelectInstruction(Constant *Cond, ConstantInt *Cond = dyn_cast<ConstantInt>(CondV->getOperand(i)); if (Cond == 0) break; - Constant *Res = (Cond->getZExtValue() ? V2 : V1)->getAggregateElement(i); + Constant *Res = (Cond->getZExtValue() ? V1 : V2)->getAggregateElement(i); if (Res == 0) break; Result.push_back(Res); } diff --git a/test/Transforms/InstCombine/2012-04-24-vselect.ll b/test/Transforms/InstCombine/2012-04-24-vselect.ll new file mode 100644 index 0000000000..8d2de2b243 --- /dev/null +++ b/test/Transforms/InstCombine/2012-04-24-vselect.ll @@ -0,0 +1,13 @@ +; RUN: opt -instcombine -S < %s | FileCheck %s + +; CHECK: @foo +; CHECK: <i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0> + +define <8 x i32> @foo() nounwind { +entry: + %v1.i = select <8 x i1> <i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, + <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>, + <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0> + ret <8 x i32> %v1.i +} + |