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authorDavid Meyer <pdox@google.com>2011-10-18 05:29:23 +0000
committerDavid Meyer <pdox@google.com>2011-10-18 05:29:23 +0000
commit928698b14e4bcd0f231dc28e246920a242d81fc1 (patch)
treef6578e23faa251daa18e12a3d593a480faba6cf9
parentfe04757f5e06ab15208ac0a2ab8d7e83c62b9f0d (diff)
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Remove NaClMode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142338 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARM.td3
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td3
-rw-r--r--lib/Target/ARM/ARMSubtarget.cpp1
-rw-r--r--lib/Target/ARM/ARMSubtarget.h3
-rw-r--r--lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp8
-rw-r--r--lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp4
-rw-r--r--lib/Target/X86/X86.td3
-rw-r--r--lib/Target/X86/X86InstrInfo.td10
-rw-r--r--lib/Target/X86/X86Subtarget.cpp8
-rw-r--r--lib/Target/X86/X86Subtarget.h3
10 files changed, 4 insertions, 42 deletions
diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td
index 5c727ad6e3..86aeeb21a7 100644
--- a/lib/Target/ARM/ARM.td
+++ b/lib/Target/ARM/ARM.td
@@ -23,9 +23,6 @@ include "llvm/Target/Target.td"
def ModeThumb : SubtargetFeature<"thumb-mode", "InThumbMode", "true",
"Thumb mode">;
-def ModeNaCl : SubtargetFeature<"nacl-mode", "InNaClMode", "true",
- "Native client mode">;
-
//===----------------------------------------------------------------------===//
// ARM Subtarget features.
//
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 3b21401e17..b509110d0b 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -213,8 +213,7 @@ def IsARM : Predicate<"!Subtarget->isThumb()">,
AssemblerPredicate<"!ModeThumb">;
def IsDarwin : Predicate<"Subtarget->isTargetDarwin()">;
def IsNotDarwin : Predicate<"!Subtarget->isTargetDarwin()">;
-def IsNaCl : Predicate<"Subtarget->isTargetNaCl()">,
- AssemblerPredicate<"ModeNaCl">;
+def IsNaCl : Predicate<"Subtarget->isTargetNaCl()">;
// FIXME: Eventually this will be just "hasV6T2Ops".
def UseMovt : Predicate<"Subtarget->useMovt()">;
diff --git a/lib/Target/ARM/ARMSubtarget.cpp b/lib/Target/ARM/ARMSubtarget.cpp
index 247d6be59a..2cb5ab9520 100644
--- a/lib/Target/ARM/ARMSubtarget.cpp
+++ b/lib/Target/ARM/ARMSubtarget.cpp
@@ -53,7 +53,6 @@ ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU,
, HasVMLxForwarding(false)
, SlowFPBrcc(false)
, InThumbMode(false)
- , InNaClMode(false)
, HasThumb2(false)
, IsMClass(false)
, NoARM(false)
diff --git a/lib/Target/ARM/ARMSubtarget.h b/lib/Target/ARM/ARMSubtarget.h
index b63e1085fb..5e884e0099 100644
--- a/lib/Target/ARM/ARMSubtarget.h
+++ b/lib/Target/ARM/ARMSubtarget.h
@@ -70,9 +70,6 @@ protected:
/// InThumbMode - True if compiling for Thumb, false for ARM.
bool InThumbMode;
- /// InNaClMode - True if targeting Native Client
- bool InNaClMode;
-
/// HasThumb2 - True if Thumb2 instructions are supported.
bool HasThumb2;
diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
index a55c41075d..6042b1191d 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
+++ b/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
@@ -89,14 +89,6 @@ std::string ARM_MC::ParseARMTriple(StringRef TT) {
ARMArchFeature += ",+thumb-mode";
}
- Triple TheTriple(TT);
- if (TheTriple.getOS() == Triple::NativeClient) {
- if (ARMArchFeature.empty())
- ARMArchFeature = "+nacl-mode";
- else
- ARMArchFeature += ",+nacl-mode";
- }
-
return ARMArchFeature;
}
diff --git a/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp b/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
index 37984195b0..03c394896c 100644
--- a/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
+++ b/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
@@ -45,10 +45,6 @@ std::string X86_MC::ParseX86Triple(StringRef TT) {
FS = "+64bit-mode";
else
FS = "-64bit-mode";
- if (TheTriple.getOS() == Triple::NativeClient)
- FS += ",+nacl-mode";
- else
- FS += ",-nacl-mode";
return FS;
}
diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td
index 7ee7df5de8..986196005f 100644
--- a/lib/Target/X86/X86.td
+++ b/lib/Target/X86/X86.td
@@ -23,9 +23,6 @@ include "llvm/Target/Target.td"
def Mode64Bit : SubtargetFeature<"64bit-mode", "In64BitMode", "true",
"64-bit mode (x86_64)">;
-def ModeNaCl : SubtargetFeature<"nacl-mode", "InNaClMode", "true",
- "Native Client mode">;
-
//===----------------------------------------------------------------------===//
// X86 Subtarget features.
//===----------------------------------------------------------------------===//
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 1151b022f7..e3701caf5b 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -490,14 +490,8 @@ def In64BitMode : Predicate<"Subtarget->is64Bit()">,
AssemblerPredicate<"Mode64Bit">;
def IsWin64 : Predicate<"Subtarget->isTargetWin64()">;
def NotWin64 : Predicate<"!Subtarget->isTargetWin64()">;
-def IsNaCl : Predicate<"Subtarget->isTargetNaCl()">,
- AssemblerPredicate<"ModeNaCl">;
-def IsNaCl32 : Predicate<"Subtarget->isTargetNaCl32()">,
- AssemblerPredicate<"ModeNaCl,!Mode64Bit">;
-def IsNaCl64 : Predicate<"Subtarget->isTargetNaCl64()">,
- AssemblerPredicate<"ModeNaCl,Mode64Bit">;
-def NotNaCl : Predicate<"!Subtarget->isTargetNaCl()">,
- AssemblerPredicate<"!ModeNaCl">;
+def IsNaCl : Predicate<"Subtarget->isTargetNaCl()">;
+def NotNaCl : Predicate<"!Subtarget->isTargetNaCl()">;
def SmallCode : Predicate<"TM.getCodeModel() == CodeModel::Small">;
def KernelCode : Predicate<"TM.getCodeModel() == CodeModel::Kernel">;
def FarData : Predicate<"TM.getCodeModel() != CodeModel::Small &&"
diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp
index 45a8c2f1e8..fd8ef19139 100644
--- a/lib/Target/X86/X86Subtarget.cpp
+++ b/lib/Target/X86/X86Subtarget.cpp
@@ -321,8 +321,7 @@ X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
// FIXME: this is a known good value for Yonah. How about others?
, MaxInlineSizeThreshold(128)
, TargetTriple(TT)
- , In64BitMode(is64Bit)
- , InNaClMode(false) {
+ , In64BitMode(is64Bit) {
// Determine default and user specified characteristics
if (!FS.empty() || !CPU.empty()) {
std::string CPUName = CPU;
@@ -368,11 +367,6 @@ X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
if (In64BitMode)
ToggleFeature(X86::Mode64Bit);
- if (isTargetNaCl()) {
- InNaClMode = true;
- ToggleFeature(X86::ModeNaCl);
- }
-
if (HasAVX)
X86SSELevel = NoMMXSSE;
diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h
index 81fa176bd0..5e08f014e7 100644
--- a/lib/Target/X86/X86Subtarget.h
+++ b/lib/Target/X86/X86Subtarget.h
@@ -137,9 +137,6 @@ private:
/// In64BitMode - True if compiling for 64-bit, false for 32-bit.
bool In64BitMode;
- /// InNaClMode - True if compiling for Native Client target.
- bool InNaClMode;
-
public:
/// This constructor initializes the data members to match that