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| author | Jim Grosbach <grosbach@apple.com> | 2011-10-18 18:01:52 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-10-18 18:01:52 +0000 |
| commit | 970f787a7e3929c9cc1c0faabf224d26c1fcd252 (patch) | |
| tree | 1341c005773145e31d63a59a3402189a5802e57e | |
| parent | ec11d2a1b86378df0d65819b725e2a6b88acafd4 (diff) | |
| download | llvm-970f787a7e3929c9cc1c0faabf224d26c1fcd252.tar.gz llvm-970f787a7e3929c9cc1c0faabf224d26c1fcd252.tar.bz2 llvm-970f787a7e3929c9cc1c0faabf224d26c1fcd252.tar.xz | |
ARM vmul assembly parsing for the lane index operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142381 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrNEON.td | 8 | ||||
| -rw-r--r-- | test/MC/ARM/neont2-mul-encoding.s | 12 |
2 files changed, 10 insertions, 10 deletions
diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index 7818a1eae1..e022f03cf0 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -1936,8 +1936,8 @@ class N3VDSL<bits<2> op21_20, bits<4> op11_8, InstrItinClass itin, string OpcodeStr, string Dt, ValueType Ty, SDNode ShOp> : N3VLane32<0, 1, op21_20, op11_8, 1, 0, - (outs DPR:$Vd), (ins DPR:$Vn, DPR_VFP2:$Vm, nohash_imm:$lane), - NVMulSLFrm, itin, OpcodeStr, Dt, "$Vd, $Vn, $Vm[$lane]", "", + (outs DPR:$Vd), (ins DPR:$Vn, DPR_VFP2:$Vm, VectorIndex32:$lane), + NVMulSLFrm, itin, OpcodeStr, Dt, "$Vd, $Vn, $Vm$lane", "", [(set (Ty DPR:$Vd), (Ty (ShOp (Ty DPR:$Vn), (Ty (NEONvduplane (Ty DPR_VFP2:$Vm),imm:$lane)))))]> { @@ -1946,8 +1946,8 @@ class N3VDSL<bits<2> op21_20, bits<4> op11_8, class N3VDSL16<bits<2> op21_20, bits<4> op11_8, string OpcodeStr, string Dt, ValueType Ty, SDNode ShOp> : N3VLane16<0, 1, op21_20, op11_8, 1, 0, - (outs DPR:$Vd), (ins DPR:$Vn, DPR_8:$Vm, nohash_imm:$lane), - NVMulSLFrm, IIC_VMULi16D, OpcodeStr, Dt,"$Vd, $Vn, $Vm[$lane]","", + (outs DPR:$Vd), (ins DPR:$Vn, DPR_8:$Vm, VectorIndex16:$lane), + NVMulSLFrm, IIC_VMULi16D, OpcodeStr, Dt,"$Vd, $Vn, $Vm$lane","", [(set (Ty DPR:$Vd), (Ty (ShOp (Ty DPR:$Vn), (Ty (NEONvduplane (Ty DPR_8:$Vm), imm:$lane)))))]> { diff --git a/test/MC/ARM/neont2-mul-encoding.s b/test/MC/ARM/neont2-mul-encoding.s index 98f7aa11ea..673b9e2b5f 100644 --- a/test/MC/ARM/neont2-mul-encoding.s +++ b/test/MC/ARM/neont2-mul-encoding.s @@ -22,6 +22,10 @@ vmul.p8 d16, d16, d17 @ CHECK: vmul.p8 q8, q8, q9 @ encoding: [0x40,0xff,0xf2,0x09] vmul.p8 q8, q8, q9 + + vmul.i16 d18, d8, d0[3] +@ CHECK: vmul.i16 d18, d8, d0[3] @ encoding: [0xd8,0xef,0x68,0x28] + @ CHECK: vqdmulh.s16 d16, d16, d17 @ encoding: [0x50,0xef,0xa1,0x0b] vqdmulh.s16 d16, d16, d17 @ CHECK: vqdmulh.s32 d16, d16, d17 @ encoding: [0x60,0xef,0xa1,0x0b] @@ -57,11 +61,7 @@ @ CHECK: vqdmull.s32 q8, d16, d17 @ encoding: [0xe0,0xef,0xa1,0x0d] vqdmull.s32 q8, d16, d17 +@ vmla.i32 q12, q8, d3[0] +@ vqdmulh.s16 d11, d2, d3[0] @ FIXME: vmla.i32 q12, q8, d3[0] @ encoding: [0xe0,0xff,0xc3,0x80] -@ vmla.i32 q12, q8, d3[0] @ FIXME: vqdmulh.s16 d11, d2, d3[0] @ encoding: [0x92,0xef,0x43,0xbc] -@ vqdmulh.s16 d11, d2, d3[0] -@ FIXME: vmul.i16 d18, d8, d0[3] @ encoding: [0xd8,0xef,0x68,0x28] -@ vmul.i16 d18, d8, d0[3] - - |