diff options
| author | Michael Liao <michael.liao@intel.com> | 2012-08-11 23:47:06 +0000 |
|---|---|---|
| committer | Michael Liao <michael.liao@intel.com> | 2012-08-11 23:47:06 +0000 |
| commit | 9eac20ac88b82d39aaac9838631f268f3ef69d2c (patch) | |
| tree | 563c5e80b97c8b28c20ff2c1a90de82fd76f8600 | |
| parent | 235e2e6f0dc8b715ea5b5c005022f04778c6fcb3 (diff) | |
| download | llvm-9eac20ac88b82d39aaac9838631f268f3ef69d2c.tar.gz llvm-9eac20ac88b82d39aaac9838631f268f3ef69d2c.tar.bz2 llvm-9eac20ac88b82d39aaac9838631f268f3ef69d2c.tar.xz | |
fix PR13577, an issue introduced by r161687
- FCMOV only supports a subset of X86 conditions. Skip boolean
simplification if X86 condition is not valid for FCMOV.
- add a minimal test case for PR13577.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161732 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 20 | ||||
| -rw-r--r-- | test/CodeGen/X86/pr13577.ll | 8 |
2 files changed, 27 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index af1675b4d9..5dbe633d6e 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -13843,6 +13843,22 @@ static SDValue BoolTestSetCCCombine(SDValue Cmp, X86::CondCode &CC) { return SetCC.getOperand(1); } +static bool IsValidFCMOVCondition(X86::CondCode CC) { + switch (CC) { + default: + return false; + case X86::COND_B: + case X86::COND_BE: + case X86::COND_E: + case X86::COND_P: + case X86::COND_AE: + case X86::COND_A: + case X86::COND_NE: + case X86::COND_NP: + return true; + } +} + /// Optimize X86ISD::CMOV [LHS, RHS, CONDCODE (e.g. X86::COND_NE), CONDVAL] static SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI) { @@ -13871,7 +13887,9 @@ static SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG, SDValue Flags; Flags = BoolTestSetCCCombine(Cond, CC); - if (Flags.getNode()) { + if (Flags.getNode() && + // Extra check as FCMOV only supports a subset of X86 cond. + (FalseOp.getValueType() != MVT::f80 || IsValidFCMOVCondition(CC))) { SDValue Ops[] = { FalseOp, TrueOp, DAG.getConstant(CC, MVT::i8), Flags }; return DAG.getNode(X86ISD::CMOV, DL, N->getVTList(), diff --git a/test/CodeGen/X86/pr13577.ll b/test/CodeGen/X86/pr13577.ll new file mode 100644 index 0000000000..faaec262cb --- /dev/null +++ b/test/CodeGen/X86/pr13577.ll @@ -0,0 +1,8 @@ +; RUN: llc < %s -march=x86-64 + +define x86_fp80 @foo(x86_fp80 %a) { + %1 = tail call x86_fp80 @copysignl(x86_fp80 0xK7FFF8000000000000000, x86_fp80 %a) nounwind readnone + ret x86_fp80 %1 +} + +declare x86_fp80 @copysignl(x86_fp80, x86_fp80) nounwind readnone |