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authorTom Stellard <thomas.stellard@amd.com>2014-01-22 19:24:24 +0000
committerTom Stellard <thomas.stellard@amd.com>2014-01-22 19:24:24 +0000
commitb1d24c51fc6138ea11f8ee25b1612e74bc169d35 (patch)
treec36a349678e66b488432721bf19c9f0a619b2f83
parente7d4e83702722ad9de8719d80a410144a43034f5 (diff)
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R600: MOVA is vector only
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199827 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/R600/R600Instructions.td2
-rw-r--r--test/CodeGen/R600/private-memory.ll4
2 files changed, 4 insertions, 2 deletions
diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td
index 34bbdd9fa5..c135d49329 100644
--- a/lib/Target/R600/R600Instructions.td
+++ b/lib/Target/R600/R600Instructions.td
@@ -1547,7 +1547,7 @@ let Predicates = [isEGorCayman] in {
defm CUBE_eg : CUBE_Common<0xC0>;
let hasSideEffects = 1 in {
- def MOVA_INT_eg : R600_1OP <0xCC, "MOVA_INT", []>;
+ def MOVA_INT_eg : R600_1OP <0xCC, "MOVA_INT", [], VecALU>;
}
def TGSI_LIT_Z_eg : TGSI_LIT_Z_Common<MUL_LIT_eg, LOG_CLAMPED_eg, EXP_IEEE_eg>;
diff --git a/test/CodeGen/R600/private-memory.ll b/test/CodeGen/R600/private-memory.ll
index 1bd17bf604..e22c718f31 100644
--- a/test/CodeGen/R600/private-memory.ll
+++ b/test/CodeGen/R600/private-memory.ll
@@ -116,6 +116,7 @@ for.end:
; R600-CHECK: MOV {{\** *}}T{{[0-9]\.[XYZW]}}, literal
; R600-CHECK: 65536
+; R600-CHECK: *
; R600-CHECK: MOVA_INT
; SI-CHECK: V_MOV_B32_e32 v{{[0-9]}}, 65536
@@ -138,7 +139,8 @@ entry:
; R600-CHECK: OR_INT {{\** *}}T{{[0-9]\.[XYZW]}}, {{[PVT0-9]+\.[XYZW]}}, literal
; R600-CHECK: 256
-; R600-CHECK: MOVA_INT
+; R600-CHECK: *
+; R600-CHECK-NEXT: MOVA_INT
; SI-CHECK: V_OR_B32_e32 v{{[0-9]}}, 256
; SI-CHECK: V_MOVRELS_B32_e32