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author | Jim Grosbach <grosbach@apple.com> | 2010-12-09 19:50:12 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2010-12-09 19:50:12 +0000 |
commit | b492a7c2134d3886f545f1b5ea55115d71529a10 (patch) | |
tree | 6764264f43525449eb16cb1ec0c657ad1f3496fc | |
parent | dea914bed9fb1d5c08e944557989ccddb6849000 (diff) | |
download | llvm-b492a7c2134d3886f545f1b5ea55115d71529a10.tar.gz llvm-b492a7c2134d3886f545f1b5ea55115d71529a10.tar.bz2 llvm-b492a7c2134d3886f545f1b5ea55115d71529a10.tar.xz |
Rename CB/CBZ specific fixup accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121404 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/MC/ELFObjectWriter.cpp | 2 | ||||
-rw-r--r-- | lib/Target/ARM/ARMAsmBackend.cpp | 4 | ||||
-rw-r--r-- | lib/Target/ARM/ARMFixupKinds.h | 4 | ||||
-rw-r--r-- | lib/Target/ARM/ARMMCCodeEmitter.cpp | 4 |
4 files changed, 7 insertions, 7 deletions
diff --git a/lib/MC/ELFObjectWriter.cpp b/lib/MC/ELFObjectWriter.cpp index 0b4d042881..ac39979766 100644 --- a/lib/MC/ELFObjectWriter.cpp +++ b/lib/MC/ELFObjectWriter.cpp @@ -1556,7 +1556,7 @@ unsigned ARMELFObjectWriter::GetRelocType(const MCValue &Target, case ARM::fixup_arm_pcrel_10: case ARM::fixup_arm_adr_pcrel_12: case ARM::fixup_arm_thumb_bl: - case ARM::fixup_arm_thumb_br: + case ARM::fixup_arm_thumb_cb: case ARM::fixup_arm_thumb_cp: assert(0 && "Unimplemented"); break; case ARM::fixup_arm_branch: diff --git a/lib/Target/ARM/ARMAsmBackend.cpp b/lib/Target/ARM/ARMAsmBackend.cpp index 0f96d6120d..6be9f9288e 100644 --- a/lib/Target/ARM/ARMAsmBackend.cpp +++ b/lib/Target/ARM/ARMAsmBackend.cpp @@ -194,7 +194,7 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) { // 'off by 4' is implicitly handled by the half-word ordering of the // Thumb encoding, so we only need to adjust by 2 here. return ((Value - 2) >> 2) & 0xff; - case ARM::fixup_arm_thumb_br: { + case ARM::fixup_arm_thumb_cb: { // Offset by 4 and don't encode the lower bit, which is always 0. uint32_t Binary = (Value - 4) >> 1; return ((Binary & 0x20) << 9) | ((Binary & 0x1f) << 3); @@ -312,7 +312,7 @@ static unsigned getFixupKindNumBytes(unsigned Kind) { case ARM::fixup_arm_thumb_cp: return 1; - case ARM::fixup_arm_thumb_br: + case ARM::fixup_arm_thumb_cb: return 2; case ARM::fixup_arm_ldst_pcrel_12: diff --git a/lib/Target/ARM/ARMFixupKinds.h b/lib/Target/ARM/ARMFixupKinds.h index 8ee61d11aa..10b5321ec2 100644 --- a/lib/Target/ARM/ARMFixupKinds.h +++ b/lib/Target/ARM/ARMFixupKinds.h @@ -46,8 +46,8 @@ enum Fixups { // fixup_arm_thumb_blx - Fixup for Thumb BLX instructions. fixup_arm_thumb_blx, - // fixup_arm_thumb_br - Fixup for Thumb branch instructions. - fixup_arm_thumb_br, + // fixup_arm_thumb_cb - Fixup for Thumb branch instructions. + fixup_arm_thumb_cb, // fixup_arm_thumb_cp - Fixup for Thumb load/store from constant pool instrs. fixup_arm_thumb_cp, diff --git a/lib/Target/ARM/ARMMCCodeEmitter.cpp b/lib/Target/ARM/ARMMCCodeEmitter.cpp index d0812a00d3..c81833b28f 100644 --- a/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -55,7 +55,7 @@ public: { "fixup_t2_branch", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_bl", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_blx", 0, 32, MCFixupKindInfo::FKF_IsPCRel }, - { "fixup_arm_thumb_br", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, + { "fixup_arm_thumb_cb", 0, 16, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_thumb_cp", 1, 8, MCFixupKindInfo::FKF_IsPCRel }, { "fixup_arm_movt_hi16", 0, 16, 0 }, { "fixup_arm_movw_lo16", 0, 16, 0 }, @@ -462,7 +462,7 @@ getThumbBLXTargetOpValue(const MCInst &MI, unsigned OpIdx, uint32_t ARMMCCodeEmitter:: getThumbCBTargetOpValue(const MCInst &MI, unsigned OpIdx, SmallVectorImpl<MCFixup> &Fixups) const { - return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_br, Fixups); + return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_cb, Fixups); } /// getBranchTargetOpValue - Return encoding info for 24-bit immediate branch |