summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorEvan Cheng <evan.cheng@apple.com>2008-09-13 01:38:29 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-09-13 01:38:29 +0000
commitbe3034c28893617d31e9ce7ed9ad2e128e92877b (patch)
tree8fbb86f6c08df6ed009fa64da9a03ecab510d342
parent05fc9664018f867b2184589e8a04cc8f056cfa16 (diff)
downloadllvm-be3034c28893617d31e9ce7ed9ad2e128e92877b.tar.gz
llvm-be3034c28893617d31e9ce7ed9ad2e128e92877b.tar.bz2
llvm-be3034c28893617d31e9ce7ed9ad2e128e92877b.tar.xz
Rely on instruction format to determine so_reg operand for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56181 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMCodeEmitter.cpp6
1 files changed, 5 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index 7abb7d2418..1484d165e4 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -372,7 +372,11 @@ unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI,
}
// Encode shifter operand.
- if (TID.getNumOperands() - OpIdx > 1)
+ bool HasSoReg = (Format == ARMII::DPRdSoReg ||
+ Format == ARMII::DPRnSoReg ||
+ Format == ARMII::DPRSoReg ||
+ Format == ARMII::DPRSoRegS);
+ if (HasSoReg)
// Encode SoReg.
return Binary | getMachineSoRegOpValue(MI, TID, OpIdx);