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| author | Jim Grosbach <grosbach@apple.com> | 2012-03-30 16:31:31 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2012-03-30 16:31:31 +0000 |
| commit | c0164f86080bc9d7a41fd5eabd0d6556396f5b38 (patch) | |
| tree | 31f1be052ec45637f1f5e190fbd7b12f0a0a17dc | |
| parent | 7c7121edb9d3560cdc0b57f20212176c0697ec51 (diff) | |
| download | llvm-c0164f86080bc9d7a41fd5eabd0d6556396f5b38.tar.gz llvm-c0164f86080bc9d7a41fd5eabd0d6556396f5b38.tar.bz2 llvm-c0164f86080bc9d7a41fd5eabd0d6556396f5b38.tar.xz | |
ARM assembly parsing needs to be paranoid about negative immediates.
Make sure to treat immediates as unsigned when doing relative comparisons.
rdar://11153621
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153753 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 6 | ||||
| -rw-r--r-- | test/MC/ARM/basic-thumb2-instructions.s | 5 |
2 files changed, 7 insertions, 4 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index e0022064ba..bfac79495c 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -6835,7 +6835,7 @@ processInstruction(MCInst &Inst, // explicitly specified. From the ARM ARM: "Encoding T1 is preferred // to encoding T2 if <Rd> is specified and encoding T2 is preferred // to encoding T1 if <Rd> is omitted." - if (Inst.getOperand(3).getImm() < 8 && Operands.size() == 6) { + if ((unsigned)Inst.getOperand(3).getImm() < 8 && Operands.size() == 6) { Inst.setOpcode(ARM::tADDi3); return true; } @@ -6845,7 +6845,7 @@ processInstruction(MCInst &Inst, // explicitly specified. From the ARM ARM: "Encoding T1 is preferred // to encoding T2 if <Rd> is specified and encoding T2 is preferred // to encoding T1 if <Rd> is omitted." - if (Inst.getOperand(3).getImm() < 8 && Operands.size() == 6) { + if ((unsigned)Inst.getOperand(3).getImm() < 8 && Operands.size() == 6) { Inst.setOpcode(ARM::tSUBi3); return true; } @@ -6966,7 +6966,7 @@ processInstruction(MCInst &Inst, // If we can use the 16-bit encoding and the user didn't explicitly // request the 32-bit variant, transform it here. if (isARMLowRegister(Inst.getOperand(0).getReg()) && - Inst.getOperand(1).getImm() <= 255 && + (unsigned)Inst.getOperand(1).getImm() <= 255 && ((!inITBlock() && Inst.getOperand(2).getImm() == ARMCC::AL && Inst.getOperand(4).getReg() == ARM::CPSR) || (inITBlock() && Inst.getOperand(4).getReg() == 0)) && diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index ce97ca666f..0cbaae4a54 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -1130,6 +1130,8 @@ _func: moveq r1, #12 movne.w r1, #12 mov.w r6, #450 + it lo + movlo r1, #-1 @ alias for mvn mov r3, #-3 @@ -1149,7 +1151,8 @@ _func: @ CHECK: moveq r1, #12 @ encoding: [0x0c,0x21] @ CHECK: movne.w r1, #12 @ encoding: [0x4f,0xf0,0x0c,0x01] @ CHECK: mov.w r6, #450 @ encoding: [0x4f,0xf4,0xe1,0x76] - +@ CHECK: it lo @ encoding: [0x38,0xbf] +@ CHECK: movlo.w r1, #-1 @ encoding: [0x4f,0xf0,0xff,0x31] @ CHECK: mvn r3, #2 @ encoding: [0x6f,0xf0,0x02,0x03] @------------------------------------------------------------------------------ |