Recognize armv7a and friends as aliases for armv7-a etc. for the purpose

of architecture naming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198043 91177308-0d34-0410-b5e6-96231b3b80d8

8 files changed, 132 insertions, 0 deletions

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 209741aaae..073d6c8dbd 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -8119,6 +8119,8 @@ bool ARMAsmParser::parseDirectiveArch(SMLoc L) {
   unsigned ID = StringSwitch<unsigned>(Arch)
 #define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
     .Case(NAME, ARM::ID)
+#define ARM_ARCH_ALIAS(NAME, ID) \
+    .Case(NAME, ARM::ID)
 #include "MCTargetDesc/ARMArchName.def"
     .Default(ARM::INVALID_ARCH);
 
diff --git a/lib/Target/ARM/MCTargetDesc/ARMArchName.def b/lib/Target/ARM/MCTargetDesc/ARMArchName.def
index 37e814e072..9f007a035a 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMArchName.def
+++ b/lib/Target/ARM/MCTargetDesc/ARMArchName.def
@@ -36,10 +36,15 @@ ARM_ARCH_NAME("armv6zk", ARMV6ZK, "6ZK",     v6KZ)
 ARM_ARCH_NAME("armv6-m", ARMV6M,  "6-M",     v6_M)
 ARM_ARCH_NAME("armv7",   ARMV7,   "7",       v7)
 ARM_ARCH_NAME("armv7-a", ARMV7A,  "7-A",     v7)
+ARM_ARCH_ALIAS("armv7a", ARMV7A)
 ARM_ARCH_NAME("armv7-r", ARMV7R,  "7-R",     v7)
+ARM_ARCH_ALIAS("armv7r", ARMV7R)
 ARM_ARCH_NAME("armv7-m", ARMV7M,  "7-M",     v7)
+ARM_ARCH_ALIAS("armv7m", ARMV7M)
 ARM_ARCH_NAME("armv8-a", ARMV8A,  "8-A",     v8)
+ARM_ARCH_ALIAS("armv8a", ARMV8A)
 ARM_ARCH_NAME("iwmmxt",  IWMMXT,  "iwmmxt",  v5TE)
 ARM_ARCH_NAME("iwmmxt2", IWMMXT2, "iwmmxt2", v5TE)
 
 #undef ARM_ARCH_NAME
+#undef ARM_ARCH_ALIAS
diff --git a/lib/Target/ARM/MCTargetDesc/ARMArchName.h b/lib/Target/ARM/MCTargetDesc/ARMArchName.h
index d0de9ccb8a..34b9fc126f 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMArchName.h
+++ b/lib/Target/ARM/MCTargetDesc/ARMArchName.h
@@ -17,6 +17,7 @@ enum ArchKind {
   INVALID_ARCH = 0
 
 #define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) , ID
+#define ARM_ARCH_ALIAS(NAME, ID) /* empty */
 #include "ARMArchName.def"
 };
 
diff --git a/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
index 2d2497895c..39bcbf3e52 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
+++ b/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
@@ -71,6 +71,7 @@ static const char *GetArchName(unsigned ID) {
     break;
 #define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
   case ARM::ID: return NAME;
+#define ARM_ARCH_ALIAS(NAME, ID) /* empty */
 #include "ARMArchName.def"
   }
   return NULL;
@@ -83,6 +84,7 @@ static const char *GetArchDefaultCPUName(unsigned ID) {
     break;
 #define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
   case ARM::ID: return DEFAULT_CPU_NAME;
+#define ARM_ARCH_ALIAS(NAME, ID) /* empty */
 #include "ARMArchName.def"
   }
   return NULL;
@@ -95,6 +97,7 @@ static unsigned GetArchDefaultCPUArch(unsigned ID) {
     break;
 #define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH) \
   case ARM::ID: return ARMBuildAttrs::DEFAULT_CPU_ARCH;
+#define ARM_ARCH_ALIAS(NAME, ID) /* empty */
 #include "ARMArchName.def"
   }
   return 0;
diff --git a/test/MC/ARM/directive-arch-armv7a.s b/test/MC/ARM/directive-arch-armv7a.s
new file mode 100644
index 0000000000..ceb6277b7a
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv7a.s
@@ -0,0 +1,30 @@
+@ Test the .arch directive for armv7-a
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv7-a architecture when using the armv7a alias.
+
+@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
+@ RUN:   | FileCheck %s --check-prefix=CHECK-ASM
+@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
+@ RUN:   | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+
+	.syntax	unified
+	.arch	armv7a
+
+@ CHECK-ASM: 	.arch	armv7-a
+
+@ CHECK-OBJ:    Name: .ARM.attributes
+@ CHECK-OBJ:    Type: SHT_ARM_ATTRIBUTES (0x70000003)
+@ CHECK-OBJ:    Flags [ (0x0)
+@ CHECK-OBJ:    ]
+@ CHECK-OBJ:    Address: 0x0
+@ CHECK-OBJ:    Offset: 0x34
+@ CHECK-OBJ:    Size: 29
+@ CHECK-OBJ:    Link: 0
+@ CHECK-OBJ:    Info: 0
+@ CHECK-OBJ:    AddressAlignment: 1
+@ CHECK-OBJ:    EntrySize: 0
+@ CHECK-OBJ:    SectionData (
+@ CHECK-OBJ:      0000: 411C0000 00616561 62690001 12000000  |A....aeabi......|
+@ CHECK-OBJ:      0010: 05372D41 00060A07 41080109 02        |.7-A....A....|
+@ CHECK-OBJ:    )
diff --git a/test/MC/ARM/directive-arch-armv7m.s b/test/MC/ARM/directive-arch-armv7m.s
new file mode 100644
index 0000000000..e18b028726
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv7m.s
@@ -0,0 +1,30 @@
+@ Test the .arch directive for armv7-m
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv7-m architecture when using the armv7m alias.
+
+@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
+@ RUN:   | FileCheck %s --check-prefix=CHECK-ASM
+@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
+@ RUN:   | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+
+	.syntax	unified
+	.arch	armv7m
+
+@ CHECK-ASM: 	.arch	armv7-m
+
+@ CHECK-OBJ:    Name: .ARM.attributes
+@ CHECK-OBJ:    Type: SHT_ARM_ATTRIBUTES (0x70000003)
+@ CHECK-OBJ:    Flags [ (0x0)
+@ CHECK-OBJ:    ]
+@ CHECK-OBJ:    Address: 0x0
+@ CHECK-OBJ:    Offset: 0x34
+@ CHECK-OBJ:    Size: 27
+@ CHECK-OBJ:    Link: 0
+@ CHECK-OBJ:    Info: 0
+@ CHECK-OBJ:    AddressAlignment: 1
+@ CHECK-OBJ:    EntrySize: 0
+@ CHECK-OBJ:    SectionData (
+@ CHECK-OBJ:      0000: 411A0000 00616561 62690001 10000000  |A....aeabi......|
+@ CHECK-OBJ:      0010: 05372D4D 00060A07 4D0902             |.7-M....M..|
+@ CHECK-OBJ:    )
diff --git a/test/MC/ARM/directive-arch-armv7r.s b/test/MC/ARM/directive-arch-armv7r.s
new file mode 100644
index 0000000000..2a10c6ee7d
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv7r.s
@@ -0,0 +1,30 @@
+@ Test the .arch directive for armv7-r
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv7-r architecture when using the armv7r alias.
+
+@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
+@ RUN:   | FileCheck %s --check-prefix=CHECK-ASM
+@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
+@ RUN:   | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+
+	.syntax	unified
+	.arch	armv7r
+
+@ CHECK-ASM: 	.arch	armv7-r
+
+@ CHECK-OBJ:    Name: .ARM.attributes
+@ CHECK-OBJ:    Type: SHT_ARM_ATTRIBUTES (0x70000003)
+@ CHECK-OBJ:    Flags [ (0x0)
+@ CHECK-OBJ:    ]
+@ CHECK-OBJ:    Address: 0x0
+@ CHECK-OBJ:    Offset: 0x34
+@ CHECK-OBJ:    Size: 29
+@ CHECK-OBJ:    Link: 0
+@ CHECK-OBJ:    Info: 0
+@ CHECK-OBJ:    AddressAlignment: 1
+@ CHECK-OBJ:    EntrySize: 0
+@ CHECK-OBJ:    SectionData (
+@ CHECK-OBJ:      0000: 411C0000 00616561 62690001 12000000  |A....aeabi......|
+@ CHECK-OBJ:      0010: 05372D52 00060A07 52080109 02        |.7-R....R....|
+@ CHECK-OBJ:    )
diff --git a/test/MC/ARM/directive-arch-armv8a.s b/test/MC/ARM/directive-arch-armv8a.s
new file mode 100644
index 0000000000..c3fae4e9cb
--- /dev/null
+++ b/test/MC/ARM/directive-arch-armv8a.s
@@ -0,0 +1,31 @@
+@ Test the .arch directive for armv8-a
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv8-a architecture when using the armv8a alias.
+
+@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
+@ RUN:   | FileCheck %s --check-prefix=CHECK-ASM
+@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
+@ RUN:   | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+
+	.syntax	unified
+	.arch	armv8a
+
+@ CHECK-ASM: 	.arch	armv8-a
+
+@ CHECK-OBJ:    Name: .ARM.attributes
+@ CHECK-OBJ:    Type: SHT_ARM_ATTRIBUTES (0x70000003)
+@ CHECK-OBJ:    Flags [ (0x0)
+@ CHECK-OBJ:    ]
+@ CHECK-OBJ:    Address: 0x0
+@ CHECK-OBJ:    Offset: 0x34
+@ CHECK-OBJ:    Size: 33
+@ CHECK-OBJ:    Link: 0
+@ CHECK-OBJ:    Info: 0
+@ CHECK-OBJ:    AddressAlignment: 1
+@ CHECK-OBJ:    EntrySize: 0
+@ CHECK-OBJ:    SectionData (
+@ CHECK-OBJ:      0000: 41200000 00616561 62690001 16000000  |A ...aeabi......|
+@ CHECK-OBJ:      0010: 05382D41 00060E07 41080109 022A0144  |.8-A....A....*.D|
+@ CHECK-OBJ:      0020: 03                                   |.|
+@ CHECK-OBJ:    )