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authorDave Estes <cestes@codeaurora.org>2014-05-21 16:19:51 +0000
committerDave Estes <cestes@codeaurora.org>2014-05-21 16:19:51 +0000
commitc12c3d075383806be3b7dd2a5166124c6de8de34 (patch)
tree3ac1e0ac16d8cf59d1bc1882ffec2ef53d61f756
parent820861536c125a3da403b2bb7e9d9399fdf0fcdd (diff)
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Test comment commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209306 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--test/CodeGen/ARM64/misched-basic-A53.ll5
1 files changed, 2 insertions, 3 deletions
diff --git a/test/CodeGen/ARM64/misched-basic-A53.ll b/test/CodeGen/ARM64/misched-basic-A53.ll
index b87a523a30..d69b097a9b 100644
--- a/test/CodeGen/ARM64/misched-basic-A53.ll
+++ b/test/CodeGen/ARM64/misched-basic-A53.ll
@@ -110,9 +110,8 @@ attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"=
attributes #1 = { nounwind }
-; Regression Test for Bug 19761
-; - [ARM64] Cortex-a53 schedule mode can't handle NEON post-increment load
-; - http://llvm.org/bugs/show_bug.cgi?id=19761
+; Regression Test for PR19761
+; [ARM64] Cortex-a53 schedule mode can't handle NEON post-increment load
;
; Nothing explicit to check other than llc not crashing.
define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2(i8* %A, i8** %ptr) {