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| author | Kay Tiong Khoo <kkhoo@perfwizard.com> | 2013-04-10 21:52:25 +0000 |
|---|---|---|
| committer | Kay Tiong Khoo <kkhoo@perfwizard.com> | 2013-04-10 21:52:25 +0000 |
| commit | c92cc5d9184c6a5f043dc22e186ff76eb0e18775 (patch) | |
| tree | 0f15f934b495c23a5111c64a0aae29e48db26893 | |
| parent | c3b5997910d34b7cdd4bca4f0da48c4488009e5b (diff) | |
| download | llvm-c92cc5d9184c6a5f043dc22e186ff76eb0e18775.tar.gz llvm-c92cc5d9184c6a5f043dc22e186ff76eb0e18775.tar.bz2 llvm-c92cc5d9184c6a5f043dc22e186ff76eb0e18775.tar.xz | |
fixed xsave, xsaveopt, xrstor mnemonics with intel syntax; added test cases
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179223 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrSystem.td | 6 | ||||
| -rw-r--r-- | test/MC/Disassembler/X86/intel-syntax.txt | 9 | ||||
| -rw-r--r-- | test/MC/Disassembler/X86/x86-64.txt | 9 |
3 files changed, 21 insertions, 3 deletions
diff --git a/lib/Target/X86/X86InstrSystem.td b/lib/Target/X86/X86InstrSystem.td index 74683bc3da..869304d1b4 100644 --- a/lib/Target/X86/X86InstrSystem.td +++ b/lib/Target/X86/X86InstrSystem.td @@ -449,15 +449,15 @@ let Uses = [RDX, RAX] in { def XSAVE : I<0xAE, MRM4m, (outs opaque512mem:$dst), (ins), "xsave\t$dst", []>, TB; def XSAVE64 : I<0xAE, MRM4m, (outs opaque512mem:$dst), (ins), - "xsaveq\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>; + "xsave{q|64}\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>; def XRSTOR : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst), "xrstor\t$dst", []>, TB; def XRSTOR64 : I<0xAE, MRM5m, (outs), (ins opaque512mem:$dst), - "xrstorq\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>; + "xrstor{q|64}\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>; def XSAVEOPT : I<0xAE, MRM6m, (outs opaque512mem:$dst), (ins), "xsaveopt\t$dst", []>, TB; def XSAVEOPT64 : I<0xAE, MRM6m, (outs opaque512mem:$dst), (ins), - "xsaveoptq\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>; + "xsaveopt{q|64}\t$dst", []>, TB, REX_W, Requires<[In64BitMode]>; } } // SchedRW diff --git a/test/MC/Disassembler/X86/intel-syntax.txt b/test/MC/Disassembler/X86/intel-syntax.txt index 27694cd014..57e602f150 100644 --- a/test/MC/Disassembler/X86/intel-syntax.txt +++ b/test/MC/Disassembler/X86/intel-syntax.txt @@ -110,3 +110,12 @@ # CHECK: vpgatherdd XMM10, DWORD PTR [R15 + 2*XMM9], XMM8 0xc4 0x02 0x39 0x90 0x14 0x4f + +# CHECK: xsave64 OPAQUE PTR [RAX] +0x48 0x0f 0xae 0x20 + +# CHECK: xrstor64 OPAQUE PTR [RAX] +0x48 0x0f 0xae 0x28 + +# CHECK: xsaveopt64 OPAQUE PTR [RAX] +0x48 0x0f 0xae 0x30 diff --git a/test/MC/Disassembler/X86/x86-64.txt b/test/MC/Disassembler/X86/x86-64.txt index 5de1d59784..efa82484e0 100644 --- a/test/MC/Disassembler/X86/x86-64.txt +++ b/test/MC/Disassembler/X86/x86-64.txt @@ -112,3 +112,12 @@ # CHECK: xabort $13 0xc6 0xf8 0x0d + +# CHECK: xsaveq (%rax) +0x48 0x0f 0xae 0x20 + +# CHECK: xrstorq (%rax) +0x48 0x0f 0xae 0x28 + +# CHECK: xsaveoptq (%rax) +0x48 0x0f 0xae 0x30 |