summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>2010-07-21 08:56:24 +0000
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>2010-07-21 08:56:24 +0000
commitcf6ca031288332c4fb43a314a3c30df8deeb2ffb (patch)
treee86abbb02284accedb7d4ceee400552afb20b87a
parentc61f6b424bdc7b065e6a2064b7c2a87a64c10593 (diff)
downloadllvm-cf6ca031288332c4fb43a314a3c30df8deeb2ffb.tar.gz
llvm-cf6ca031288332c4fb43a314a3c30df8deeb2ffb.tar.bz2
llvm-cf6ca031288332c4fb43a314a3c30df8deeb2ffb.tar.xz
Add AVX only vzeroall and vzeroupper instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109002 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86InstrSSE.td6
-rw-r--r--lib/Target/X86/X86MCCodeEmitter.cpp6
-rw-r--r--test/MC/AsmParser/X86/x86_32-encoding.s8
3 files changed, 18 insertions, 2 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
index 76bc0ff482..121406c47f 100644
--- a/lib/Target/X86/X86InstrSSE.td
+++ b/lib/Target/X86/X86InstrSSE.td
@@ -5076,4 +5076,10 @@ def VPERM2F128rm : AVXAIi8<0x06, MRMSrcMem, (outs VR256:$dst),
"vperm2f128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
[]>, VEX_4V;
+// Zero All YMM registers
+def VZEROALL : I<0x77, RawFrm, (outs), (ins), "vzeroall", []>, VEX, VEX_L;
+
+// Zero Upper bits of YMM registers
+def VZEROUPPER : I<0x77, RawFrm, (outs), (ins), "vzeroupper", []>, VEX;
+
} // isAsmParserOnly
diff --git a/lib/Target/X86/X86MCCodeEmitter.cpp b/lib/Target/X86/X86MCCodeEmitter.cpp
index 230c9d0418..b39fce1f79 100644
--- a/lib/Target/X86/X86MCCodeEmitter.cpp
+++ b/lib/Target/X86/X86MCCodeEmitter.cpp
@@ -514,7 +514,10 @@ void X86MCCodeEmitter::EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte,
VEX_X = 0x0;
}
break;
- default: // MRMDestReg, MRM0r-MRM7r
+ default: // MRMDestReg, MRM0r-MRM7r, RawFrm
+ if (!MI.getNumOperands())
+ break;
+
if (MI.getOperand(CurOp).isReg() &&
X86InstrInfo::isX86_64ExtendedReg(MI.getOperand(CurOp).getReg()))
VEX_B = 0;
@@ -530,7 +533,6 @@ void X86MCCodeEmitter::EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte,
VEX_R = 0x0;
}
break;
- assert(0 && "Not implemented!");
}
// Emit segment override opcode prefix as needed.
diff --git a/test/MC/AsmParser/X86/x86_32-encoding.s b/test/MC/AsmParser/X86/x86_32-encoding.s
index 8c62260c3f..130f39ff33 100644
--- a/test/MC/AsmParser/X86/x86_32-encoding.s
+++ b/test/MC/AsmParser/X86/x86_32-encoding.s
@@ -13134,3 +13134,11 @@
// CHECK: encoding: [0xc4,0xe3,0x55,0x06,0x08,0x07]
vperm2f128 $7, (%eax), %ymm5, %ymm1
+// CHECK: vzeroall
+// CHECK: encoding: [0xc5,0xfc,0x77]
+ vzeroall
+
+// CHECK: vzeroupper
+// CHECK: encoding: [0xc5,0xf8,0x77]
+ vzeroupper
+