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authorDale Johannesen <dalej@apple.com>2010-01-09 01:24:25 +0000
committerDale Johannesen <dalej@apple.com>2010-01-09 01:24:25 +0000
commitd2035203a0359eedbc1cf4ae77d43176e8455cd4 (patch)
tree8a84bfdc4a62c87ec13a5dd63f6d041a3a86d208
parent380e80fb539745c2a4d3bcdf24ce1a69e7900c66 (diff)
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Add DEBUG_DECLARE. Not used yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93040 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--include/llvm/Target/Target.td8
-rw-r--r--include/llvm/Target/TargetInstrInfo.h5
-rw-r--r--utils/TableGen/CodeEmitterGen.cpp9
-rw-r--r--utils/TableGen/CodeGenTarget.cpp9
-rw-r--r--utils/TableGen/InstrInfoEmitter.cpp3
5 files changed, 28 insertions, 6 deletions
diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td
index d6465b8e8a..740bf4f74d 100644
--- a/include/llvm/Target/Target.td
+++ b/include/llvm/Target/Target.td
@@ -485,6 +485,14 @@ def DEBUG_VALUE : Instruction {
let neverHasSideEffects = 1;
let isAsCheapAsAMove = 1;
}
+def DEBUG_DECLARE : Instruction {
+ let OutOperandList = (ops);
+ let InOperandList = (ops unknown:$vbl, unknown:$meta);
+ let AsmString = "DEBUG_DECLARE";
+ let Namespace = "TargetInstrInfo";
+ let neverHasSideEffects = 1;
+ let isAsCheapAsAMove = 1;
+}
}
//===----------------------------------------------------------------------===//
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 83c5307486..c57a2d4c23 100644
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -91,7 +91,10 @@ public:
COPY_TO_REGCLASS = 10,
// DEBUG_VALUE - a mapping of the llvm.dbg.value intrinsic
- DEBUG_VALUE = 11
+ DEBUG_VALUE = 11,
+
+ // DEBUG_DECLARE - a mapping of the llvm.dbg.declare intrinsic
+ DEBUG_DECLARE = 12
};
unsigned getNumOpcodes() const { return NumOpcodes; }
diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp
index 714a39c7f4..23d42de33d 100644
--- a/utils/TableGen/CodeEmitterGen.cpp
+++ b/utils/TableGen/CodeEmitterGen.cpp
@@ -35,7 +35,8 @@ void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
R->getName() == "IMPLICIT_DEF" ||
R->getName() == "SUBREG_TO_REG" ||
R->getName() == "COPY_TO_REGCLASS" ||
- R->getName() == "DEBUG_VALUE") continue;
+ R->getName() == "DEBUG_VALUE" ||
+ R->getName() == "DEBUG_DECLARE") continue;
BitsInit *BI = R->getValueAsBitsInit("Inst");
@@ -113,7 +114,8 @@ void CodeEmitterGen::run(raw_ostream &o) {
R->getName() == "IMPLICIT_DEF" ||
R->getName() == "SUBREG_TO_REG" ||
R->getName() == "COPY_TO_REGCLASS" ||
- R->getName() == "DEBUG_VALUE") {
+ R->getName() == "DEBUG_VALUE" ||
+ R->getName() == "DEBUG_DECLARE") {
o << " 0U,\n";
continue;
}
@@ -152,7 +154,8 @@ void CodeEmitterGen::run(raw_ostream &o) {
InstName == "IMPLICIT_DEF" ||
InstName == "SUBREG_TO_REG" ||
InstName == "COPY_TO_REGCLASS" ||
- InstName == "DEBUG_VALUE") continue;
+ InstName == "DEBUG_VALUE" ||
+ InstName == "DEBUG_DECLARE") continue;
BitsInit *BI = R->getValueAsBitsInit("Inst");
const std::vector<RecordVal> &Vals = R->getValues();
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index c9af5f7213..572a9a85c4 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -342,6 +342,11 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
throw "Could not find 'DEBUG_VALUE' instruction!";
const CodeGenInstruction *DEBUG_VALUE = &I->second;
+ I = getInstructions().find("DEBUG_DECLARE");
+ if (I == Instructions.end())
+ throw "Could not find 'DEBUG_DECLARE' instruction!";
+ const CodeGenInstruction *DEBUG_DECLARE = &I->second;
+
// Print out the rest of the instructions now.
NumberedInstructions.push_back(PHI);
NumberedInstructions.push_back(INLINEASM);
@@ -355,6 +360,7 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
NumberedInstructions.push_back(SUBREG_TO_REG);
NumberedInstructions.push_back(COPY_TO_REGCLASS);
NumberedInstructions.push_back(DEBUG_VALUE);
+ NumberedInstructions.push_back(DEBUG_DECLARE);
for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
if (&II->second != PHI &&
&II->second != INLINEASM &&
@@ -367,7 +373,8 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
&II->second != IMPLICIT_DEF &&
&II->second != SUBREG_TO_REG &&
&II->second != COPY_TO_REGCLASS &&
- &II->second != DEBUG_VALUE)
+ &II->second != DEBUG_VALUE &&
+ &II->second != DEBUG_DECLARE)
NumberedInstructions.push_back(&II->second);
}
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index cf40c78fa7..92d7048062 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -346,7 +346,8 @@ void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val,
R->getName() != "IMPLICIT_DEF" &&
R->getName() != "SUBREG_TO_REG" &&
R->getName() != "COPY_TO_REGCLASS" &&
- R->getName() != "DEBUG_VALUE")
+ R->getName() != "DEBUG_VALUE" &&
+ R->getName() != "DEBUG_DECLARE")
throw R->getName() + " doesn't have a field named '" +
Val->getValue() + "'!";
return;