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authorEvan Cheng <evan.cheng@apple.com>2006-02-16 01:50:02 +0000
committerEvan Cheng <evan.cheng@apple.com>2006-02-16 01:50:02 +0000
commitd51425a82da3d519b85f86e380358aa22e63442d (patch)
tree29e1e895fd1e74fcc5d952093691ee40f4c3eed7
parentf17c42d409ce9d981996dea11918774e84400eea (diff)
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Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg
transfer. According to the Intel P4 Optimization Manual: Moves that write a portion of a register can introduce unwanted dependences. The movsd reg, reg instruction writes only the bottom 64 bits of a register, not to all 128 bits. This introduces a dependence on the preceding instruction that produces the upper 64 bits (even if those bits are not longer wanted). The dependence inhibits register renaming, and thereby reduces parallelism. Not to mention movaps is shorter than movss. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26226 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86RegisterInfo.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index fdbe4225a0..571bef18db 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -106,9 +106,9 @@ void X86RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
} else if (RC == &X86::RFPRegClass || RC == &X86::RSTRegClass) {
Opc = X86::FpMOV;
} else if (RC == &X86::FR32RegClass || RC == &X86::V4F4RegClass) {
- Opc = X86::MOVSSrr;
+ Opc = X86::MOVAPSrr;
} else if (RC == &X86::FR64RegClass || RC == &X86::V2F8RegClass) {
- Opc = X86::MOVSDrr;
+ Opc = X86::MOVAPDrr;
} else {
assert(0 && "Unknown regclass");
abort();