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authorDale Johannesen <dalej@apple.com>2008-09-19 18:52:31 +0000
committerDale Johannesen <dalej@apple.com>2008-09-19 18:52:31 +0000
commitd6bd73353403fd6f132d20b68750fe4bf8c0af64 (patch)
treec17927247f0b2b35767e2c03fd82391c284d713c
parent135ccbd74f041caccfbc26a0c935006dfa828e84 (diff)
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Make earlyclobber stuff work when virtual regs
have previously been assigned conflicting physreg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56364 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/RegAllocLinearScan.cpp34
1 files changed, 26 insertions, 8 deletions
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index af70db882e..000dd41b97 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -174,6 +174,7 @@ namespace {
void ComputeRelatedRegClasses();
bool noEarlyClobberConflict(LiveInterval *cur, unsigned RegNo);
+ unsigned findPhysReg(MachineOperand &MO);
template <typename ItTy>
void printIntervals(const char* const str, ItTy i, ItTy e) const {
@@ -1003,6 +1004,19 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
unhandled_.push(added[i]);
}
+/// findPhysReg - get the physical register, if any, assigned to this operand.
+/// This may be an original physical register, or the physical register which
+/// has been assigned to a virtual register.
+unsigned RALinScan::findPhysReg(MachineOperand &MO) {
+ unsigned PhysReg = MO.getReg();
+ if (PhysReg && TargetRegisterInfo::isVirtualRegister(PhysReg)) {
+ if (!vrm_->hasPhys(PhysReg))
+ return 0;
+ PhysReg = vrm_->getPhys(PhysReg);
+ }
+ return PhysReg;
+}
+
/// noEarlyClobberConflict - see whether LiveInternal cur has a conflict with
/// hard reg HReg because of earlyclobbers.
///
@@ -1032,11 +1046,13 @@ bool RALinScan::noEarlyClobberConflict(LiveInterval *cur, unsigned HReg) {
if (MI->getOpcode()==TargetInstrInfo::INLINEASM) {
for (int i = MI->getNumOperands()-1; i>=0; --i) {
MachineOperand &MO = MI->getOperand(i);
- if (MO.isRegister() && MO.getReg() && MO.isEarlyClobber() &&
- HReg==MO.getReg()) {
- DOUT << " earlyclobber conflict: " <<
+ if (MO.isRegister() && MO.isEarlyClobber()) {
+ unsigned PhysReg = findPhysReg(MO);
+ if (HReg==PhysReg) {
+ DOUT << " earlyclobber conflict: " <<
"%reg" << cur->reg << ", " << tri_->getName(HReg) << "\n\t";
- return false;
+ return false;
+ }
}
}
}
@@ -1051,10 +1067,12 @@ bool RALinScan::noEarlyClobberConflict(LiveInterval *cur, unsigned HReg) {
bool earlyClobberFound = false, overlapFound = false;
for (int i = MI->getNumOperands()-1; i>=0; --i) {
MachineOperand &MO = MI->getOperand(i);
- if (MO.isRegister() && MO.getReg()) {
- if ((MO.overlapsEarlyClobber() || MO.isEarlyClobber()) &&
- HReg==MO.getReg())
- overlapFound = true;
+ if (MO.isRegister()) {
+ if ((MO.overlapsEarlyClobber() || MO.isEarlyClobber())) {
+ unsigned PhysReg = findPhysReg(MO);
+ if (HReg==PhysReg)
+ overlapFound = true;
+ }
if (MO.isEarlyClobber() && cur->reg==MO.getReg())
earlyClobberFound = true;
}