summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorChad Rosier <mcrosier@codeaurora.org>2013-10-16 21:04:39 +0000
committerChad Rosier <mcrosier@codeaurora.org>2013-10-16 21:04:39 +0000
commitdceac4c5a611f26ebcc88c75cc39075c7df2466e (patch)
tree898987ddcb712fdb62a7ac139882726d376a03af
parenta249914462c7b8f0c25b21eca77df264455290ee (diff)
downloadllvm-dceac4c5a611f26ebcc88c75cc39075c7df2466e.tar.gz
llvm-dceac4c5a611f26ebcc88c75cc39075c7df2466e.tar.bz2
llvm-dceac4c5a611f26ebcc88c75cc39075c7df2466e.tar.xz
[AArch64] Add support for NEON scalar negate instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192843 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--include/llvm/IR/IntrinsicsAArch64.td4
-rw-r--r--lib/Target/AArch64/AArch64InstrNEON.td4
-rw-r--r--test/CodeGen/AArch64/neon-scalar-neg.ll12
-rw-r--r--test/MC/AArch64/neon-diagnostics.s10
-rw-r--r--test/MC/AArch64/neon-scalar-neg.s8
-rw-r--r--test/MC/Disassembler/AArch64/neon-instructions.txt6
6 files changed, 44 insertions, 0 deletions
diff --git a/include/llvm/IR/IntrinsicsAArch64.td b/include/llvm/IR/IntrinsicsAArch64.td
index d11c672ef9..f707df7be2 100644
--- a/include/llvm/IR/IntrinsicsAArch64.td
+++ b/include/llvm/IR/IntrinsicsAArch64.td
@@ -200,4 +200,8 @@ def int_aarch64_neon_vsqadd : Neon_2Arg_Intrinsic;
// Scalar Absolute Value
def int_aarch64_neon_vabs :
Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty], [IntrNoMem]>;
+
+// Scalar Negate Value
+def int_aarch64_neon_vneg :
+ Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty], [IntrNoMem]>;
}
diff --git a/lib/Target/AArch64/AArch64InstrNEON.td b/lib/Target/AArch64/AArch64InstrNEON.td
index 96a5482f99..440e739e4b 100644
--- a/lib/Target/AArch64/AArch64InstrNEON.td
+++ b/lib/Target/AArch64/AArch64InstrNEON.td
@@ -3585,6 +3585,10 @@ defm SQABS : NeonI_Scalar2SameMisc_BHSD_size<0b0, 0b00111, "sqabs">;
defm : Neon_Scalar2SameMisc_BHSD_size_patterns<int_arm_neon_vqabs,
SQABSbb, SQABShh, SQABSss, SQABSdd>;
+// Scalar Negate
+defm NEG : NeonI_Scalar2SameMisc_D_size<0b1, 0b01011, "neg">;
+defm : Neon_Scalar2SameMisc_D_size_patterns<int_aarch64_neon_vneg, NEGdd>;
+
// Scalar Signed Saturating Negate
defm SQNEG : NeonI_Scalar2SameMisc_BHSD_size<0b1, 0b00111, "sqneg">;
defm : Neon_Scalar2SameMisc_BHSD_size_patterns<int_arm_neon_vqneg,
diff --git a/test/CodeGen/AArch64/neon-scalar-neg.ll b/test/CodeGen/AArch64/neon-scalar-neg.ll
index 41d48322ad..4dc9d51978 100644
--- a/test/CodeGen/AArch64/neon-scalar-neg.ll
+++ b/test/CodeGen/AArch64/neon-scalar-neg.ll
@@ -1,5 +1,17 @@
; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
+define i64 @test_vnegd_s64(i64 %a) {
+; CHECK: test_vnegd_s64
+; CHECK: neg {{d[0-9]+}}, {{d[0-9]+}}
+entry:
+ %vneg.i = insertelement <1 x i64> undef, i64 %a, i32 0
+ %vneg1.i = tail call <1 x i64> @llvm.aarch64.neon.vneg(<1 x i64> %vneg.i)
+ %0 = extractelement <1 x i64> %vneg1.i, i32 0
+ ret i64 %0
+}
+
+declare <1 x i64> @llvm.aarch64.neon.vneg(<1 x i64>)
+
define i8 @test_vqnegb_s8(i8 %a) {
; CHECK: test_vqnegb_s8
; CHECK: sqneg {{b[0-9]+}}, {{b[0-9]+}}
diff --git a/test/MC/AArch64/neon-diagnostics.s b/test/MC/AArch64/neon-diagnostics.s
index ddd80ea178..411ea9fe0b 100644
--- a/test/MC/AArch64/neon-diagnostics.s
+++ b/test/MC/AArch64/neon-diagnostics.s
@@ -4450,3 +4450,13 @@
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR: abs d29, s24
// CHECK-ERROR: ^
+
+//----------------------------------------------------------------------
+// Scalar Negate
+//----------------------------------------------------------------------
+
+ neg d29, s24
+
+// CHECK-ERROR: error: invalid operand for instruction
+// CHECK-ERROR: neg d29, s24
+// CHECK-ERROR: ^
diff --git a/test/MC/AArch64/neon-scalar-neg.s b/test/MC/AArch64/neon-scalar-neg.s
index 0e637da794..8e5d61dd24 100644
--- a/test/MC/AArch64/neon-scalar-neg.s
+++ b/test/MC/AArch64/neon-scalar-neg.s
@@ -3,6 +3,14 @@
// Check that the assembler can handle the documented syntax for AArch64
//----------------------------------------------------------------------
+// Scalar Negate
+//----------------------------------------------------------------------
+
+ neg d29, d24
+
+// CHECK: neg d29, d24 // encoding: [0x1d,0xbb,0xe0,0x7e]
+
+//----------------------------------------------------------------------
// Scalar Signed Saturating Negate
//----------------------------------------------------------------------
diff --git a/test/MC/Disassembler/AArch64/neon-instructions.txt b/test/MC/Disassembler/AArch64/neon-instructions.txt
index 81fffd6c7c..c70a2f6486 100644
--- a/test/MC/Disassembler/AArch64/neon-instructions.txt
+++ b/test/MC/Disassembler/AArch64/neon-instructions.txt
@@ -1619,6 +1619,12 @@
0x92,0x79,0xe0,0x5e
#----------------------------------------------------------------------
+# Scalar Negate
+#----------------------------------------------------------------------
+# CHECK: neg d29, d24
+0x1d,0xbb,0xe0,0x7e
+
+#----------------------------------------------------------------------
# Scalar Signed Saturating Negate
#----------------------------------------------------------------------
# CHECK: sqneg b19, b14