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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-08-09 17:39:13 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-08-09 17:39:13 +0000 |
| commit | e2406dfd8940b3178bf452d89fed2a5df7a63043 (patch) | |
| tree | 544212c00f32eceed455c23b3f1029f2eeb90a3e | |
| parent | a511b8e519b5a13c7ace04a0e77df1e2071f2313 (diff) | |
| download | llvm-e2406dfd8940b3178bf452d89fed2a5df7a63043.tar.gz llvm-e2406dfd8940b3178bf452d89fed2a5df7a63043.tar.bz2 llvm-e2406dfd8940b3178bf452d89fed2a5df7a63043.tar.xz | |
Reapply a more appropriate solution than in r137114. AVX supports
v4f64 = sitofp v4i32. This fix PR10559.
Also add support for v4i32 = fptosi v4f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137128 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 10 | ||||
| -rw-r--r-- | test/CodeGen/X86/avx-cvt.ll | 12 |
2 files changed, 22 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 79d455a326..2b8180aac0 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -3305,6 +3305,11 @@ def CVTPD2DQrm : S3DI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), def CVTPD2DQrr : S3DI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), "cvtpd2dq\t{$src, $dst|$dst, $src}", []>; +def : Pat<(v4i32 (fp_to_sint (v4f64 VR256:$src))), + (VCVTPD2DQYrr VR256:$src)>; +def : Pat<(v4i32 (fp_to_sint (memopv4f64 addr:$src))), + (VCVTPD2DQYrm addr:$src)>; + // Convert Packed DW Integers to Packed Double FP let Predicates = [HasAVX] in { def VCVTDQ2PDrm : S3SI<0xE6, MRMSrcMem, (outs VR128:$dst), (ins f128mem:$src), @@ -3333,6 +3338,11 @@ def : Pat<(int_x86_avx_cvt_pd2dq_256 VR256:$src), def : Pat<(int_x86_avx_cvt_pd2dq_256 (memopv4f64 addr:$src)), (VCVTPD2DQYrm addr:$src)>; +def : Pat<(v4f64 (sint_to_fp (v4i32 VR128:$src))), + (VCVTDQ2PDYrr VR128:$src)>; +def : Pat<(v4f64 (sint_to_fp (memopv4i32 addr:$src))), + (VCVTDQ2PDYrm addr:$src)>; + //===---------------------------------------------------------------------===// // SSE3 - Move Instructions //===---------------------------------------------------------------------===// diff --git a/test/CodeGen/X86/avx-cvt.ll b/test/CodeGen/X86/avx-cvt.ll index e45010c903..6c0bd58074 100644 --- a/test/CodeGen/X86/avx-cvt.ll +++ b/test/CodeGen/X86/avx-cvt.ll @@ -12,6 +12,18 @@ define <8 x i32> @fptosi00(<8 x float> %a) nounwind { ret <8 x i32> %b } +; CHECK: vcvtdq2pd %xmm +define <4 x double> @sitofp01(<4 x i32> %a) { + %b = sitofp <4 x i32> %a to <4 x double> + ret <4 x double> %b +} + +; CHECK: vcvtpd2dqy %ymm +define <4 x i32> @fptosi01(<4 x double> %a) { + %b = fptosi <4 x double> %a to <4 x i32> + ret <4 x i32> %b +} + ; CHECK: vcvtpd2psy %ymm ; CHECK-NEXT: vcvtpd2psy %ymm ; CHECK-NEXT: vinsertf128 $1 |