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| author | Craig Topper <craig.topper@gmail.com> | 2013-10-07 07:19:47 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2013-10-07 07:19:47 +0000 |
| commit | e778f82a1e33826ab012bb970a406c9acf37349b (patch) | |
| tree | 8b3685bd73f2970daf84de2e5e26f463af2ffeb7 | |
| parent | 510fb362a815499dde40cfae807b2ab927527ab0 (diff) | |
| download | llvm-e778f82a1e33826ab012bb970a406c9acf37349b.tar.gz llvm-e778f82a1e33826ab012bb970a406c9acf37349b.tar.bz2 llvm-e778f82a1e33826ab012bb970a406c9acf37349b.tar.xz | |
Remove some instructions that seem to only exist to trick the filtering checks in the disassembler table creation. Just fix up the filter to let the real instruction through instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192090 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 12 | ||||
| -rw-r--r-- | test/MC/Disassembler/X86/x86-32.txt | 6 | ||||
| -rw-r--r-- | test/MC/Disassembler/X86/x86-64.txt | 6 | ||||
| -rw-r--r-- | utils/TableGen/X86RecognizableInstr.cpp | 3 |
4 files changed, 14 insertions, 13 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index b2310c70ce..3c660d17a9 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -4774,18 +4774,6 @@ def VMOVQd64rr_alt : VS2I<0x7E, MRMDestReg, (outs GR64:$dst), (ins VR128:$src), IIC_SSE_MOVDQ>, VEX, VEX_W; } // SchedRW -// Instructions for the disassembler -// xr = XMM register -// xm = mem64 - -let SchedRW = [WriteMove] in { -let Predicates = [UseAVX] in -def VMOVQxrxr: I<0x7E, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "vmovq\t{$src, $dst|$dst, $src}", []>, VEX, XS; -def MOVQxrxr : I<0x7E, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), - "movq\t{$src, $dst|$dst, $src}", [], IIC_SSE_MOVQ_RR>, XS; -} // SchedRW - //===---------------------------------------------------------------------===// // SSE3 - Replicate Single FP - MOVSHDUP and MOVSLDUP //===---------------------------------------------------------------------===// diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt index 2d2b3351de..b6a62c4f69 100644 --- a/test/MC/Disassembler/X86/x86-32.txt +++ b/test/MC/Disassembler/X86/x86-32.txt @@ -690,3 +690,9 @@ # CHECK: decl %ecx 0x49 + +# CHECK: movq %xmm0, %xmm0 +0xf3 0x0f 0x7e 0xc0 + +# CHECK: vmovq %xmm0, %xmm0 +0xc5 0xfa 0x7e 0xc0 diff --git a/test/MC/Disassembler/X86/x86-64.txt b/test/MC/Disassembler/X86/x86-64.txt index 8c3e4fdf4f..f7e71fd15d 100644 --- a/test/MC/Disassembler/X86/x86-64.txt +++ b/test/MC/Disassembler/X86/x86-64.txt @@ -223,3 +223,9 @@ # CHECK: decq %rcx 0x48 0xff 0xc9 + +# CHECK: movq %xmm0, %xmm0 +0xf3 0x0f 0x7e 0xc0 + +# CHECK: vmovq %xmm0, %xmm0 +0xc5 0xfa 0x7e 0xc0 diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp index fed3f7758e..d3427207b3 100644 --- a/utils/TableGen/X86RecognizableInstr.cpp +++ b/utils/TableGen/X86RecognizableInstr.cpp @@ -538,7 +538,8 @@ RecognizableInstr::filter_ret RecognizableInstr::filter() const { if (Name.find("MOV") != Name.npos && Name.find("r0") != Name.npos) return FILTER_WEAK; - if (Name.find("MOVZ") != Name.npos && Name.find("MOVZX") == Name.npos) + if (Name.find("MOVZ") != Name.npos && Name.find("MOVZX") == Name.npos && + Name != "MOVZPQILo2PQIrr") return FILTER_WEAK; if (Name.find("Fs") != Name.npos) return FILTER_WEAK; |