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author | Tim Northover <tnorthover@apple.com> | 2014-01-13 10:49:11 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2014-01-13 10:49:11 +0000 |
commit | eaefef43d7d8a4cc3b6bb2f35d370cdb04a54687 (patch) | |
tree | 13044ecaf38f42da397c6832b9a5dd2c61ebc910 | |
parent | a9174005842395c43cc75a310933c365a3df1d85 (diff) | |
download | llvm-eaefef43d7d8a4cc3b6bb2f35d370cdb04a54687.tar.gz llvm-eaefef43d7d8a4cc3b6bb2f35d370cdb04a54687.tar.bz2 llvm-eaefef43d7d8a4cc3b6bb2f35d370cdb04a54687.tar.xz |
Revert "ReMat: fix overly cavalier attitude to sub-register indices"
Very sorry, this was a premature patch that I still need to investigate and
finish off (for some reason beyond me at the moment it doesn't actually fix the
issue in all cases).
This reverts commit r199091.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199093 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/RegisterCoalescer.cpp | 28 |
1 files changed, 24 insertions, 4 deletions
diff --git a/lib/CodeGen/RegisterCoalescer.cpp b/lib/CodeGen/RegisterCoalescer.cpp index f0a4b28306..dd86c1f010 100644 --- a/lib/CodeGen/RegisterCoalescer.cpp +++ b/lib/CodeGen/RegisterCoalescer.cpp @@ -816,11 +816,31 @@ bool RegisterCoalescer::reMaterializeTrivialDef(CoalescerPair &CP, } if (TargetRegisterInfo::isVirtualRegister(DstReg)) { - MRI->setRegClass(DstReg, CP.getNewRC()); - unsigned NewIdx = NewMI->getOperand(0).getSubReg(); - updateRegDefsUses(DstReg, DstReg, DstIdx); - NewMI->getOperand(0).setSubReg(NewIdx); + const TargetRegisterClass *RCForInst; + if (NewIdx) + RCForInst = TRI->getMatchingSuperRegClass(MRI->getRegClass(DstReg), DefRC, + NewIdx); + + if (MRI->constrainRegClass(DstReg, DefRC)) { + // The materialized instruction is quite capable of setting DstReg + // directly, but it may still have a now-trivial subregister index which + // we should clear. + NewMI->getOperand(0).setSubReg(0); + } else if (NewIdx && RCForInst) { + // The subreg index on NewMI is essential; we still have to make sure + // DstReg:idx is in a class that NewMI can use. + MRI->constrainRegClass(DstReg, RCForInst); + } else { + // DstReg is actually incompatible with NewMI, we have to move to a + // super-reg's class. This could come from a sequence like: + // GR32 = MOV32r0 + // GR8 = COPY GR32:sub_8 + MRI->setRegClass(DstReg, CP.getNewRC()); + updateRegDefsUses(DstReg, DstReg, DstIdx); + NewMI->getOperand(0).setSubReg( + TRI->composeSubRegIndices(SrcIdx, DefMI->getOperand(0).getSubReg())); + } } else if (NewMI->getOperand(0).getReg() != CopyDstReg) { // The New instruction may be defining a sub-register of what's actually // been asked for. If so it must implicitly define the whole thing. |