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author | Bill Wendling <isanbard@gmail.com> | 2013-06-07 06:30:15 +0000 |
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committer | Bill Wendling <isanbard@gmail.com> | 2013-06-07 06:30:15 +0000 |
commit | ed8b5b55a4416286758c5567c2602d2c7d0be585 (patch) | |
tree | 5a184371bddfdf5194d79910e7bb3a2c69c3f548 | |
parent | 637eab6a3be3a15fbf2057328ec4773d77467a76 (diff) | |
download | llvm-ed8b5b55a4416286758c5567c2602d2c7d0be585.tar.gz llvm-ed8b5b55a4416286758c5567c2602d2c7d0be585.tar.bz2 llvm-ed8b5b55a4416286758c5567c2602d2c7d0be585.tar.xz |
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183492 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/MSP430/MSP430InstrInfo.cpp | 2 | ||||
-rw-r--r-- | lib/Target/MSP430/MSP430RegisterInfo.cpp | 6 | ||||
-rw-r--r-- | lib/Target/MSP430/MSP430RegisterInfo.h | 3 |
3 files changed, 5 insertions, 6 deletions
diff --git a/lib/Target/MSP430/MSP430InstrInfo.cpp b/lib/Target/MSP430/MSP430InstrInfo.cpp index a6b5f2f6d0..c8505946df 100644 --- a/lib/Target/MSP430/MSP430InstrInfo.cpp +++ b/lib/Target/MSP430/MSP430InstrInfo.cpp @@ -29,7 +29,7 @@ using namespace llvm; MSP430InstrInfo::MSP430InstrInfo(MSP430TargetMachine &tm) : MSP430GenInstrInfo(MSP430::ADJCALLSTACKDOWN, MSP430::ADJCALLSTACKUP), - RI(tm, *this) {} + RI(tm) {} void MSP430InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, diff --git a/lib/Target/MSP430/MSP430RegisterInfo.cpp b/lib/Target/MSP430/MSP430RegisterInfo.cpp index 0b3e9e2596..1a5e31240e 100644 --- a/lib/Target/MSP430/MSP430RegisterInfo.cpp +++ b/lib/Target/MSP430/MSP430RegisterInfo.cpp @@ -32,9 +32,8 @@ using namespace llvm; // FIXME: Provide proper call frame setup / destroy opcodes. -MSP430RegisterInfo::MSP430RegisterInfo(MSP430TargetMachine &tm, - const TargetInstrInfo &tii) - : MSP430GenRegisterInfo(MSP430::PCW), TM(tm), TII(tii) { +MSP430RegisterInfo::MSP430RegisterInfo(MSP430TargetMachine &tm) + : MSP430GenRegisterInfo(MSP430::PCW), TM(tm) { StackAlign = TM.getFrameLowering()->getStackAlignment(); } @@ -132,6 +131,7 @@ MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, // This is actually "load effective address" of the stack slot // instruction. We have only two-address instructions, thus we need to // expand it into mov + add + const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); MI.setDesc(TII.get(MSP430::MOV16rr)); MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); diff --git a/lib/Target/MSP430/MSP430RegisterInfo.h b/lib/Target/MSP430/MSP430RegisterInfo.h index 69cccb2752..78047cc6e6 100644 --- a/lib/Target/MSP430/MSP430RegisterInfo.h +++ b/lib/Target/MSP430/MSP430RegisterInfo.h @@ -27,13 +27,12 @@ class MSP430TargetMachine; struct MSP430RegisterInfo : public MSP430GenRegisterInfo { private: MSP430TargetMachine &TM; - const TargetInstrInfo &TII; /// StackAlign - Default stack alignment. /// unsigned StackAlign; public: - MSP430RegisterInfo(MSP430TargetMachine &tm, const TargetInstrInfo &tii); + MSP430RegisterInfo(MSP430TargetMachine &tm); /// Code Generation virtual methods... const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const; |