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| author | Richard Osborne <richard@xmos.com> | 2014-02-27 13:20:06 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2014-02-27 13:20:06 +0000 |
| commit | ef174f733a64cd1486ee6a56fd833e1802c397eb (patch) | |
| tree | 0774440bc583264c59b872d33f3039a3b16ffab8 | |
| parent | 9aef4445a34dc182556ee84b4d446a5afe9daac0 (diff) | |
| download | llvm-ef174f733a64cd1486ee6a56fd833e1802c397eb.tar.gz llvm-ef174f733a64cd1486ee6a56fd833e1802c397eb.tar.bz2 llvm-ef174f733a64cd1486ee6a56fd833e1802c397eb.tar.xz | |
[XCore] Provide information about known zero bits of resource instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202393 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/XCore/XCoreISelLowering.cpp | 28 | ||||
| -rw-r--r-- | test/CodeGen/XCore/resources_combine.ll | 52 |
2 files changed, 80 insertions, 0 deletions
diff --git a/lib/Target/XCore/XCoreISelLowering.cpp b/lib/Target/XCore/XCoreISelLowering.cpp index 7af0165329..930a4d19ba 100644 --- a/lib/Target/XCore/XCoreISelLowering.cpp +++ b/lib/Target/XCore/XCoreISelLowering.cpp @@ -1770,6 +1770,34 @@ void XCoreTargetLowering::computeMaskedBitsForTargetNode(const SDValue Op, KnownZero.getBitWidth() - 1); } break; + case ISD::INTRINSIC_W_CHAIN: + { + unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue(); + switch (IntNo) { + case Intrinsic::xcore_getts: + // High bits are known to be zero. + KnownZero = APInt::getHighBitsSet(KnownZero.getBitWidth(), + KnownZero.getBitWidth() - 16); + break; + case Intrinsic::xcore_int: + case Intrinsic::xcore_inct: + // High bits are known to be zero. + KnownZero = APInt::getHighBitsSet(KnownZero.getBitWidth(), + KnownZero.getBitWidth() - 8); + break; + case Intrinsic::xcore_testct: + // Result is either 0 or 1. + KnownZero = APInt::getHighBitsSet(KnownZero.getBitWidth(), + KnownZero.getBitWidth() - 1); + break; + case Intrinsic::xcore_testwct: + // Result is in the range 0 - 4. + KnownZero = APInt::getHighBitsSet(KnownZero.getBitWidth(), + KnownZero.getBitWidth() - 3); + break; + } + } + break; } } diff --git a/test/CodeGen/XCore/resources_combine.ll b/test/CodeGen/XCore/resources_combine.ll new file mode 100644 index 0000000000..50ac30e905 --- /dev/null +++ b/test/CodeGen/XCore/resources_combine.ll @@ -0,0 +1,52 @@ +; RUN: llc -march=xcore < %s | FileCheck %s + +declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r) +declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r) +declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r) +declare i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r) +declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r) + +define i32 @int(i8 addrspace(1)* %r) nounwind { +; CHECK-LABEL: int: +; CHECK: int r0, res[r0] +; CHECK-NEXT: retsp 0 + %result = call i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r) + %trunc = and i32 %result, 255 + ret i32 %trunc +} + +define i32 @inct(i8 addrspace(1)* %r) nounwind { +; CHECK-LABEL: inct: +; CHECK: inct r0, res[r0] +; CHECK-NEXT: retsp 0 + %result = call i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r) + %trunc = and i32 %result, 255 + ret i32 %trunc +} + +define i32 @testct(i8 addrspace(1)* %r) nounwind { +; CHECK-LABEL: testct: +; CHECK: testct r0, res[r0] +; CHECK-NEXT: retsp 0 + %result = call i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r) + %trunc = and i32 %result, 1 + ret i32 %trunc +} + +define i32 @testwct(i8 addrspace(1)* %r) nounwind { +; CHECK-LABEL: testwct: +; CHECK: testwct r0, res[r0] +; CHECK-NEXT: retsp 0 + %result = call i32 @llvm.xcore.testwct.p1i8(i8 addrspace(1)* %r) + %trunc = and i32 %result, 7 + ret i32 %trunc +} + +define i32 @getts(i8 addrspace(1)* %r) nounwind { +; CHECK-LABEL: getts: +; CHECK: getts r0, res[r0] +; CHECK-NEXT: retsp 0 + %result = call i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r) + %trunc = and i32 %result, 65535 + ret i32 %result +} |