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| author | Craig Topper <craig.topper@gmail.com> | 2014-03-09 07:58:15 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2014-03-09 07:58:15 +0000 |
| commit | feb0113a1eca4021e59e62be15b3ec36fe31030b (patch) | |
| tree | 90989fa6a7360e51bcfaa5398ce5e3e297a33e91 | |
| parent | f2c9fef815bbe17949c8a6b72ec6f7b17d7f19ed (diff) | |
| download | llvm-feb0113a1eca4021e59e62be15b3ec36fe31030b.tar.gz llvm-feb0113a1eca4021e59e62be15b3ec36fe31030b.tar.bz2 llvm-feb0113a1eca4021e59e62be15b3ec36fe31030b.tar.xz | |
De-virtualize some methods since they don't override anything.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203379 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.h | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index 2069e57ff2..a02db038f8 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -161,7 +161,7 @@ public: /// such, whenever a client has an instance of instruction info, it should /// always be able to get register info as well (through this method). /// - virtual const X86RegisterInfo &getRegisterInfo() const { return RI; } + const X86RegisterInfo &getRegisterInfo() const { return RI; } /// isCoalescableExtInstr - Return true if the instruction is a "coalescable" /// extension instruction. That is, it's like a copy where it's legal for the @@ -257,12 +257,12 @@ public: const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override; - virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill, - SmallVectorImpl<MachineOperand> &Addr, - const TargetRegisterClass *RC, - MachineInstr::mmo_iterator MMOBegin, - MachineInstr::mmo_iterator MMOEnd, - SmallVectorImpl<MachineInstr*> &NewMIs) const; + void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill, + SmallVectorImpl<MachineOperand> &Addr, + const TargetRegisterClass *RC, + MachineInstr::mmo_iterator MMOBegin, + MachineInstr::mmo_iterator MMOEnd, + SmallVectorImpl<MachineInstr*> &NewMIs) const; void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, @@ -270,12 +270,12 @@ public: const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override; - virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg, - SmallVectorImpl<MachineOperand> &Addr, - const TargetRegisterClass *RC, - MachineInstr::mmo_iterator MMOBegin, - MachineInstr::mmo_iterator MMOEnd, - SmallVectorImpl<MachineInstr*> &NewMIs) const; + void loadRegFromAddr(MachineFunction &MF, unsigned DestReg, + SmallVectorImpl<MachineOperand> &Addr, + const TargetRegisterClass *RC, + MachineInstr::mmo_iterator MMOBegin, + MachineInstr::mmo_iterator MMOEnd, + SmallVectorImpl<MachineInstr*> &NewMIs) const; bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const override; |