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author | Richard Osborne <richard@xmos.com> | 2008-11-07 12:37:45 +0000 |
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committer | Richard Osborne <richard@xmos.com> | 2008-11-07 12:37:45 +0000 |
commit | 9380c05f2d992aa65352058e798068349854b6fe (patch) | |
tree | 7d0793137518c6b9d50b5512a183acc7d5a37a3d /CMakeLists.txt | |
parent | b7ee8c4c1fe7b517b61fa07d784cf60925b4ff98 (diff) | |
download | llvm-9380c05f2d992aa65352058e798068349854b6fe.tar.gz llvm-9380c05f2d992aa65352058e798068349854b6fe.tar.bz2 llvm-9380c05f2d992aa65352058e798068349854b6fe.tar.xz |
Add XCore backend to CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58843 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'CMakeLists.txt')
-rw-r--r-- | CMakeLists.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/CMakeLists.txt b/CMakeLists.txt index b44c7fd8cf..4c01332772 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -18,7 +18,7 @@ if( MSVC ) CACHE STRING "Semicolon-separated list of targets to build") else( MSVC ) set(LLVM_TARGETS_TO_BUILD - Alpha ARM CBackend CellSPU CppBackend IA64 Mips MSIL PIC16 PowerPC Sparc X86 + Alpha ARM CBackend CellSPU CppBackend IA64 Mips MSIL PIC16 PowerPC Sparc X86 XCore CACHE STRING "Semicolon-separated list of targets to build") endif( MSVC ) |