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| author | Sanjiv Gupta <sanjiv.gupta@microchip.com> | 2008-05-14 08:03:23 +0000 |
|---|---|---|
| committer | Sanjiv Gupta <sanjiv.gupta@microchip.com> | 2008-05-14 08:03:23 +0000 |
| commit | e3f342880bc948b19ac1e9322f7738fcf4b8a07a (patch) | |
| tree | e0549a96d964b5d98a520d329dcdfa9f56dbe089 /autoconf | |
| parent | 9474ede38b7f991347c48b467397c88cbe99c163 (diff) | |
| download | llvm-e3f342880bc948b19ac1e9322f7738fcf4b8a07a.tar.gz llvm-e3f342880bc948b19ac1e9322f7738fcf4b8a07a.tar.bz2 llvm-e3f342880bc948b19ac1e9322f7738fcf4b8a07a.tar.xz | |
Added configure switches for PIC16 in configure.ac.
Regenerated configure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51096 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'autoconf')
| -rw-r--r-- | autoconf/configure.ac | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/autoconf/configure.ac b/autoconf/configure.ac index d4e071d2ac..205788e2fd 100644 --- a/autoconf/configure.ac +++ b/autoconf/configure.ac @@ -216,6 +216,7 @@ AC_CACHE_CHECK([target architecture],[llvm_cv_target_arch], ia64-*) llvm_cv_target_arch="IA64" ;; arm-*) llvm_cv_target_arch="ARM" ;; mips-*) llvm_cv_target_arch="Mips" ;; + pic16-*) llvm_cv_target_arch="PIC16" ;; *) llvm_cv_target_arch="Unknown" ;; esac]) @@ -314,6 +315,7 @@ else IA64) AC_SUBST(TARGET_HAS_JIT,0) ;; ARM) AC_SUBST(TARGET_HAS_JIT,0) ;; Mips) AC_SUBST(TARGET_HAS_JIT,0) ;; + PIC16) AC_SUBST(TARGET_HAS_JIT,0) ;; *) AC_SUBST(TARGET_HAS_JIT,0) ;; esac fi @@ -363,7 +365,7 @@ AC_ARG_ENABLE([targets],AS_HELP_STRING([--enable-targets], [Build specific host targets: all,host-only,{target-name} (default=all)]),, enableval=all) case "$enableval" in - all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU CBackend MSIL CppBackend" ;; + all) TARGETS_TO_BUILD="X86 Sparc PowerPC Alpha IA64 ARM Mips CellSPU PIC16 CBackend MSIL CppBackend" ;; host-only) case "$llvm_cv_target_arch" in x86) TARGETS_TO_BUILD="X86" ;; @@ -375,6 +377,7 @@ case "$enableval" in ARM) TARGETS_TO_BUILD="ARM" ;; Mips) TARGETS_TO_BUILD="Mips" ;; CellSPU|SPU) TARGETS_TO_BUILD="CellSPU" ;; + PIC16) TARGETS_TO_BUILD="PIC16" ;; *) AC_MSG_ERROR([Can not set target to build]) ;; esac ;; @@ -389,6 +392,7 @@ case "$enableval" in arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;; mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;; spu) TARGETS_TO_BUILD="CellSPU $TARGETS_TO_BUILD" ;; + pic16) TARGETS_TO_BUILD="PIC16 $TARGETS_TO_BUILD" ;; cbe) TARGETS_TO_BUILD="CBackend $TARGETS_TO_BUILD" ;; msil) TARGETS_TO_BUILD="MSIL $TARGETS_TO_BUILD" ;; cpp) TARGETS_TO_BUILD="CppBackend $TARGETS_TO_BUILD" ;; |