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authorJim Laskey <jlaskey@mac.com>2005-10-17 12:19:10 +0000
committerJim Laskey <jlaskey@mac.com>2005-10-17 12:19:10 +0000
commit82d61a18d5b6d6697fb03d8a6f7b289784b1b6fb (patch)
tree974a4e7a76e6e2c25c560107ba4070bf36d60c53 /docs/CodeGenerator.html
parent7d6915cf43a1c436dce75760208c99f309700a57 (diff)
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As requested, a blurb on sub-targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23769 91177308-0d34-0410-b5e6-96231b3b80d8
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diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
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@@ -444,7 +444,11 @@ href="TableGenFundamentals.html">TableGen</a> description of the register file.
<div class="doc_text">
<p>
- TODO
+ <p>The <tt>TargetSubtarget</tt> class is used to provide information about the
+ specific chip set being targeted. A sub-target informs code generation of
+ which instructions are supported, instruction latencies and instruction
+ execution itinerary; i.e., which processing units are used, in what order, and
+ for how long.
</p>
</div>