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authorJakob Stoklund Olesen <stoklund@2pi.dk>2010-08-31 22:01:07 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2010-08-31 22:01:07 +0000
commit297907f3a0487ae8e23c1ea53a50878b102211eb (patch)
treef31a25d0b7b3d56655a21de339573a31e06baacf /docs
parentdd120f936a2c2f8f1dc975dfeb69118a05dbe8ea (diff)
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Stack slot access methods are in TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112653 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs')
-rw-r--r--docs/CodeGenerator.html4
1 files changed, 2 insertions, 2 deletions
diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
index 8b1db7ac3d..4d0813fd6d 100644
--- a/docs/CodeGenerator.html
+++ b/docs/CodeGenerator.html
@@ -1457,8 +1457,8 @@ bool RegMapping_Fer::compatible_class(MachineFunction &amp;mf,
order to get and store values in memory. To assign a physical register to a
virtual register present in a given operand,
use <tt>MachineOperand::setReg(p_reg)</tt>. To insert a store instruction,
- use <tt>TargetRegisterInfo::storeRegToStackSlot(...)</tt>, and to insert a
- load instruction, use <tt>TargetRegisterInfo::loadRegFromStackSlot</tt>.</p>
+ use <tt>TargetInstrInfo::storeRegToStackSlot(...)</tt>, and to insert a
+ load instruction, use <tt>TargetInstrInfo::loadRegFromStackSlot</tt>.</p>
<p>The indirect mapping shields the application developer from the complexities
of inserting load and store instructions. In order to map a virtual register