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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-01-16 19:22:00 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-01-16 19:22:00 +0000 |
commit | 7739cad69d2590f556afc9fc3048f967b5a3f4f6 (patch) | |
tree | 0b94e1e1d7db58d9d497876c3a21d4d9e85188d9 /docs | |
parent | 1857b51ef57697992afe3955f5f90e79612142d8 (diff) | |
download | llvm-7739cad69d2590f556afc9fc3048f967b5a3f4f6.tar.gz llvm-7739cad69d2590f556afc9fc3048f967b5a3f4f6.tar.bz2 llvm-7739cad69d2590f556afc9fc3048f967b5a3f4f6.tar.xz |
Add a new kind of MachineOperand: MO_RegisterMask.
Register masks will be used as a compact representation of large clobber
lists. Currently, an x86 call instruction has some 40 operands
representing call-clobbered registers. That's more than 1kB of useless
operands per call site.
A register mask operand references a bit mask of call-preserved
registers, everything else is clobbered. The bit mask will typically
come from TargetRegisterInfo::getCallPreservedMask().
By abandoning ImplicitDefs for call-clobbered registers, it also becomes
possible to share call instruction descriptions between calling
conventions, and we can get rid of the WINCALL* instructions.
This patch introduces the new operand kind. Future patches will add
RegMask support to target-independent passes before finally the fixed
clobber lists can be removed from call instruction descriptions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148250 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs')
-rw-r--r-- | docs/CodeGenerator.html | 15 | ||||
-rw-r--r-- | docs/ReleaseNotes.html | 4 |
2 files changed, 19 insertions, 0 deletions
diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html index 6b5b204dc5..32a3a971a3 100644 --- a/docs/CodeGenerator.html +++ b/docs/CodeGenerator.html @@ -709,6 +709,21 @@ ret <!-- _______________________________________________________________________ --> <h4> + <a name="callclobber">Call-clobbered registers</a> +</h4> + +<div> + +<p>Some machine instructions, like calls, clobber a large number of physical + registers. Rather than adding <code><def,dead></code> operands for + all of them, it is possible to use an <code>MO_RegisterMask</code> operand + instead. The register mask operand holds a bit mask of preserved registers, + and everything else is considered to be clobbered by the instruction. </p> + +</div> + +<!-- _______________________________________________________________________ --> +<h4> <a name="ssa">Machine code in SSA form</a> </h4> diff --git a/docs/ReleaseNotes.html b/docs/ReleaseNotes.html index 011cbbd344..b090995da1 100644 --- a/docs/ReleaseNotes.html +++ b/docs/ReleaseNotes.html @@ -355,6 +355,10 @@ Release Notes</a>.</h1> frozen when register allocation starts. Target hooks should use the <code>MRI->canReserveReg(FramePtr)</code> method to avoid accidentally disabling frame pointer elimination during register allocation.</li> + <li>A new kind of <code>MachineOperand</code> provides a compact + representation of large clobber lists on call instructions. The register + mask operand references a bit mask of preserved registers. Everything else is + clobbered.</li> </ul> </div> |