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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-06-13 13:15:59 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-06-13 13:15:59 +0000 |
| commit | 7cfd0ffb3bd3ff32f7e931fa3daa511691fa2448 (patch) | |
| tree | ef4a6034868744ca3858da9b5e47379463d56512 /docs | |
| parent | ef8e5671375cde78dd9589ca21ffd34932acacd6 (diff) | |
| download | llvm-7cfd0ffb3bd3ff32f7e931fa3daa511691fa2448.tar.gz llvm-7cfd0ffb3bd3ff32f7e931fa3daa511691fa2448.tar.bz2 llvm-7cfd0ffb3bd3ff32f7e931fa3daa511691fa2448.tar.xz | |
[mips] Add cache and pref instructions
Summary:
cache and pref were added in MIPS-III, and MIPS32 but were re-encoded in
MIPS32r6/MIPS64r6 to use a 9-bit offset rather than the 16-bit offset
available to earlier cores.
Resolved the decoding conflict between pref and lwc3.
Depends on D4115
Reviewers: zoran.jovanovic, jkolek, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D4116
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210900 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs')
0 files changed, 0 insertions, 0 deletions