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authorJames Molloy <james.molloy@arm.com>2012-09-12 10:03:31 +0000
committerJames Molloy <james.molloy@arm.com>2012-09-12 10:03:31 +0000
commitb17cf29784ad526f3adfc20c5aa1b0de5c57033e (patch)
treeee1555c6ee080f29dd5dc4e293678c52ba3c0af1 /include/llvm/CodeGen/MachineInstrBundle.h
parent79da6ef84ff0caae6ae904840ec5bc975b6de4e7 (diff)
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Add an analyzePhysReg() function to MachineOperandIteratorBase that analyses an instruction's use of a physical register, analogous to analyzeVirtReg.
Rename RegInfo to VirtRegInfo so as not to be confused with the new PhysRegInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163694 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/MachineInstrBundle.h')
-rw-r--r--include/llvm/CodeGen/MachineInstrBundle.h40
1 files changed, 37 insertions, 3 deletions
diff --git a/include/llvm/CodeGen/MachineInstrBundle.h b/include/llvm/CodeGen/MachineInstrBundle.h
index dc5f9a6ec8..854ba06209 100644
--- a/include/llvm/CodeGen/MachineInstrBundle.h
+++ b/include/llvm/CodeGen/MachineInstrBundle.h
@@ -130,9 +130,9 @@ public:
return OpI - InstrI->operands_begin();
}
- /// RegInfo - Information about a virtual register used by a set of operands.
+ /// VirtRegInfo - Information about a virtual register used by a set of operands.
///
- struct RegInfo {
+ struct VirtRegInfo {
/// Reads - One of the operands read the virtual register. This does not
/// include <undef> or <internal> use operands, see MO::readsReg().
bool Reads;
@@ -146,6 +146,32 @@ public:
bool Tied;
};
+ /// PhysRegInfo - Information about a physical register used by a set of
+ /// operands.
+ struct PhysRegInfo {
+ /// Clobbers - Reg or an overlapping register is defined, or a regmask
+ /// clobbers Reg.
+ bool Clobbers;
+
+ /// Defines - Reg or a super-register is defined.
+ bool Defines;
+
+ /// DefinesOverlap - Reg or an overlapping register is defined.
+ bool DefinesOverlap;
+
+ /// Reads - Read or a super-register is read.
+ bool Reads;
+
+ /// ReadsOverlap - Reg or an overlapping register is read.
+ bool ReadsOverlap;
+
+ /// DefinesDead - All defs of a Reg or a super-register are dead.
+ bool DefinesDead;
+
+ /// There is a kill of Reg or a super-register.
+ bool Kills;
+ };
+
/// analyzeVirtReg - Analyze how the current instruction or bundle uses a
/// virtual register. This function should not be called after operator++(),
/// it expects a fresh iterator.
@@ -154,8 +180,16 @@ public:
/// @param Ops When set, this vector will receive an (MI, OpNum) entry for
/// each operand referring to Reg.
/// @returns A filled-in RegInfo struct.
- RegInfo analyzeVirtReg(unsigned Reg,
+ VirtRegInfo analyzeVirtReg(unsigned Reg,
SmallVectorImpl<std::pair<MachineInstr*, unsigned> > *Ops = 0);
+
+ /// analyzePhysReg - Analyze how the current instruction or bundle uses a
+ /// physical register. This function should not be called after operator++(),
+ /// it expects a fresh iterator.
+ ///
+ /// @param Reg The physical register to analyze.
+ /// @returns A filled-in PhysRegInfo struct.
+ PhysRegInfo analyzePhysReg(unsigned Reg, const TargetRegisterInfo *TRI);
};
/// MIOperands - Iterate over operands of a single instruction.