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authorJakob Stoklund Olesen <stoklund@2pi.dk>2009-08-08 13:18:47 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2009-08-08 13:18:47 +0000
commitdffb051c21d32209c601ca0ca6baae75b6c6463f (patch)
treef72fce48e93ea8ecaad15d40472456bceb4de997 /include/llvm/CodeGen/RegisterScavenging.h
parent20c08e534f04cafab755ce9c78882a954c0fb032 (diff)
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Simplify RegScavenger::forward a bit more.
Verify that early clobber registers and their aliases are not used. All changes to RegsAvailable are now done as a transaction so the order of operands makes no difference. The included test case is from PR4686. It has behaviour that was dependent on the order of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78465 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/RegisterScavenging.h')
-rw-r--r--include/llvm/CodeGen/RegisterScavenging.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/include/llvm/CodeGen/RegisterScavenging.h b/include/llvm/CodeGen/RegisterScavenging.h
index b0bcc6724e..478da3d142 100644
--- a/include/llvm/CodeGen/RegisterScavenging.h
+++ b/include/llvm/CodeGen/RegisterScavenging.h
@@ -162,8 +162,14 @@ private:
MachineInstr *findFirstUse(MachineBasicBlock *MBB,
MachineBasicBlock::iterator I, unsigned Reg,
unsigned &Dist);
+
+ /// Add Reg and all its sub-registers to BV.
+ void addRegWithSubRegs(BitVector &BV, unsigned Reg);
+
+ /// Add Reg and its aliases to BV.
+ void addRegWithAliases(BitVector &BV, unsigned Reg);
};
-
+
} // End llvm namespace
#endif