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authorDan Gohman <gohman@apple.com>2009-02-11 04:27:20 +0000
committerDan Gohman <gohman@apple.com>2009-02-11 04:27:20 +0000
commit47ac0f0c7c39289f5970688154e385be22b7f293 (patch)
treeb5171c709044c112ff2b4c1ebd44d1cd1f5f89f4 /include/llvm/CodeGen/SchedulerRegistry.h
parentca70533d3daeda66f6a0f19faf6691c20b34d086 (diff)
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When scheduling a block in parts, keep track of the overall
instruction index across each part. Instruction indices are used to make live range queries, and live ranges can extend beyond scheduling region boundaries. Refactor the ScheduleDAGSDNodes class some more so that it doesn't have to worry about this additional information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64288 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/SchedulerRegistry.h')
-rw-r--r--include/llvm/CodeGen/SchedulerRegistry.h24
1 files changed, 12 insertions, 12 deletions
diff --git a/include/llvm/CodeGen/SchedulerRegistry.h b/include/llvm/CodeGen/SchedulerRegistry.h
index b4daa05203..c967bfc446 100644
--- a/include/llvm/CodeGen/SchedulerRegistry.h
+++ b/include/llvm/CodeGen/SchedulerRegistry.h
@@ -26,13 +26,13 @@ namespace llvm {
//===----------------------------------------------------------------------===//
class SelectionDAGISel;
-class ScheduleDAG;
+class ScheduleDAGSDNodes;
class SelectionDAG;
class MachineBasicBlock;
class RegisterScheduler : public MachinePassRegistryNode {
public:
- typedef ScheduleDAG *(*FunctionPassCtor)(SelectionDAGISel*, bool);
+ typedef ScheduleDAGSDNodes *(*FunctionPassCtor)(SelectionDAGISel*, bool);
static MachinePassRegistry Registry;
@@ -63,28 +63,28 @@ public:
/// createBURRListDAGScheduler - This creates a bottom up register usage
/// reduction list scheduler.
-ScheduleDAG* createBURRListDAGScheduler(SelectionDAGISel *IS,
- bool Fast);
+ScheduleDAGSDNodes *createBURRListDAGScheduler(SelectionDAGISel *IS,
+ bool Fast);
/// createTDRRListDAGScheduler - This creates a top down register usage
/// reduction list scheduler.
-ScheduleDAG* createTDRRListDAGScheduler(SelectionDAGISel *IS,
- bool Fast);
+ScheduleDAGSDNodes *createTDRRListDAGScheduler(SelectionDAGISel *IS,
+ bool Fast);
/// createTDListDAGScheduler - This creates a top-down list scheduler with
/// a hazard recognizer.
-ScheduleDAG* createTDListDAGScheduler(SelectionDAGISel *IS,
- bool Fast);
+ScheduleDAGSDNodes *createTDListDAGScheduler(SelectionDAGISel *IS,
+ bool Fast);
/// createFastDAGScheduler - This creates a "fast" scheduler.
///
-ScheduleDAG *createFastDAGScheduler(SelectionDAGISel *IS,
- bool Fast);
+ScheduleDAGSDNodes *createFastDAGScheduler(SelectionDAGISel *IS,
+ bool Fast);
/// createDefaultScheduler - This creates an instruction scheduler appropriate
/// for the target.
-ScheduleDAG* createDefaultScheduler(SelectionDAGISel *IS,
- bool Fast);
+ScheduleDAGSDNodes *createDefaultScheduler(SelectionDAGISel *IS,
+ bool Fast);
} // end namespace llvm