Move the scheduler constructor functions to SchedulerRegistry.h, to

simplify header dependencies for front-ends that just want to choose
a scheduler and don't need all the scheduling machinery declarations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59978 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 40 insertions, 3 deletions

diff --git a/include/llvm/CodeGen/SchedulerRegistry.h b/include/llvm/CodeGen/SchedulerRegistry.h
index 84a0fec574..d7e39aecbd 100644
--- a/include/llvm/CodeGen/SchedulerRegistry.h
+++ b/include/llvm/CodeGen/SchedulerRegistry.h
@@ -31,9 +31,7 @@ class SelectionDAG;
 class MachineBasicBlock;
 
 class RegisterScheduler : public MachinePassRegistryNode {
-
 public:
-
   typedef ScheduleDAG *(*FunctionPassCtor)(SelectionDAGISel*, SelectionDAG*,
                                         const TargetMachine *,
                                         MachineBasicBlock*, bool);
@@ -63,9 +61,48 @@ public:
   static void setListener(MachinePassRegistryListener *L) {
     Registry.setListener(L);
   }
-  
 };
 
+/// createBURRListDAGScheduler - This creates a bottom up register usage
+/// reduction list scheduler.
+ScheduleDAG* createBURRListDAGScheduler(SelectionDAGISel *IS,
+                                        SelectionDAG *DAG,
+                                        const TargetMachine *TM,
+                                        MachineBasicBlock *BB,
+                                        bool Fast);
+
+/// createTDRRListDAGScheduler - This creates a top down register usage
+/// reduction list scheduler.
+ScheduleDAG* createTDRRListDAGScheduler(SelectionDAGISel *IS,
+                                        SelectionDAG *DAG,
+                                        const TargetMachine *TM,
+                                        MachineBasicBlock *BB,
+                                        bool Fast);
+
+/// createTDListDAGScheduler - This creates a top-down list scheduler with
+/// a hazard recognizer.
+ScheduleDAG* createTDListDAGScheduler(SelectionDAGISel *IS,
+                                      SelectionDAG *DAG,
+                                      const TargetMachine *TM,
+                                      MachineBasicBlock *BB,
+                                      bool Fast);
+                                      
+/// createFastDAGScheduler - This creates a "fast" scheduler.
+///
+ScheduleDAG *createFastDAGScheduler(SelectionDAGISel *IS,
+                                    SelectionDAG *DAG,
+                                    const TargetMachine *TM,
+                                    MachineBasicBlock *BB,
+                                    bool Fast);
+
+/// createDefaultScheduler - This creates an instruction scheduler appropriate
+/// for the target.
+ScheduleDAG* createDefaultScheduler(SelectionDAGISel *IS,
+                                    SelectionDAG *DAG,
+                                    const TargetMachine *TM,
+                                    MachineBasicBlock *BB,
+                                    bool Fast);
+
 } // end namespace llvm