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author | Chris Lattner <sabre@nondot.org> | 2006-02-24 02:12:52 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2006-02-24 02:12:52 +0000 |
commit | 4c12e719c9ba9f15e1b1c9f680d823938557dcc9 (patch) | |
tree | 779dcf683770b2dba46242e44e8f567d7104d473 /include/llvm/CodeGen/SelectionDAGISel.h | |
parent | 87bc3bd1213ced06eade93e3267178198d41a381 (diff) | |
download | llvm-4c12e719c9ba9f15e1b1c9f680d823938557dcc9.tar.gz llvm-4c12e719c9ba9f15e1b1c9f680d823938557dcc9.tar.bz2 llvm-4c12e719c9ba9f15e1b1c9f680d823938557dcc9.tar.xz |
Add some hooks for selecting memory addresses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26347 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include/llvm/CodeGen/SelectionDAGISel.h')
-rw-r--r-- | include/llvm/CodeGen/SelectionDAGISel.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/include/llvm/CodeGen/SelectionDAGISel.h b/include/llvm/CodeGen/SelectionDAGISel.h index 5a58297cb2..805699390d 100644 --- a/include/llvm/CodeGen/SelectionDAGISel.h +++ b/include/llvm/CodeGen/SelectionDAGISel.h @@ -49,11 +49,28 @@ public: virtual void EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {} virtual void InstructionSelectBasicBlock(SelectionDAG &SD) = 0; + /// SelectInlineAsmMemoryOperand - Select the specified address as a target + /// addressing mode, according to the specified constraint code. If this does + /// not match or is not implemented, return true. The resultant operands + /// (which will appear in the machine instruction) should be added to the + /// OutOps vector. + virtual bool SelectInlineAsmMemoryOperand(const SDOperand &Op, + char ConstraintCode, + std::vector<SDOperand> &OutOps, + SelectionDAG &DAG) { + return true; + } + protected: /// Pick a safe ordering and emit instructions for each target node in the /// graph. void ScheduleAndEmitDAG(SelectionDAG &DAG); + /// SelectInlineAsmMemoryOperands - Calls to this are automatically generated + /// by tblgen. Others should not call it. + void SelectInlineAsmMemoryOperands(std::vector<SDOperand> &Ops, + SelectionDAG &DAG); + private: SDOperand CopyValueToVirtualRegister(SelectionDAGLowering &SDL, Value *V, unsigned Reg); |